A/A* GRADE PAPER 1 OCR COMPUTING A LEVEL REVISION NOTES
1.1.1 structure and function of the processor
CU: control unit
- deals with interrupts
- sends read/write requests
- sends control signals to other parts of the CPU
- contains the clock which coordinates CPU activity
ALU: arithmetic logic unit
- carries out calculations and other logical operations
ACC: holds the result of calculations
PC: holds the address of the next instruction + value sent to MAR
MDR: contains the data that has been fetched from or is about to be stored in memory +
contents copied to CIR
MAR: contains the address of data that must be fetched from or sent to memory - sent by
the PC
CIR: stores the most recently fetched instruction/stores instruction currently being
processed
registers: a superfast form of memory used to store data
buses..
- control
- provides control signals to cause memory or input/output to perform a
read/write operation
- data
- carries the data
- address
- provides memory address to system memory or input/output devices
FDE cycle:
- fetch…
- PC copies the address of the instruction to MAR
- CU loads the address to be used on the address bus
- CU triggers a read signal down the control bus which causes RAM to place
the instruction being asked for on the data bus
- data bus’ instruction copied into the MDR
- MDR copies instruction to the CIR
- PC incremented
, - decode…
- CIR contents sent to the CU which decodes the instruction
- execute..
- the instruction is executed
factors affecting CPU performance..
- cache size
- small and very fast memory built into the CPU
- holds the instructions or data frequently used, recently used or about to be
used
- expensive
- clock speed
- increases the number of instructions that can be executed per second
- “overclocking” -- overheating the CPU can cause damage
- number of cores
- each core can independently carry out FDE
- multiple instructions can be processed at the same time
pipelining: fetching an instruction whilst prev is being decoded whilst prev is being
executed
- pipeline controller has to predict jump instructions to keep pipe full -- if the
controller makes a mistake the pipelines have to be flushed which degrades
performance
Von Neumann:
- single ALU
- single CU
- works sequentially through instructions
- instructions and data stored in the same memory unit
- simpler operating system
- slower than array processing on large data sets
Harvard:
- memory is split into two parts
- data and programs
- more expensive + harder to program
modern architecture uses parallel processing
- pipelining
- array processing
- SIMD --- i.e. GPU
- a number of ALUs allow one instruction to be performed on a large data set
simultaneously
- multicore processing
- MIMD
, - each CPU has multiple cores or each computer has multiple CPUs (i.e. a
supercomputer)
types of processors:
- CISC
- more complex hardware due to different sized registers
- greater energy consumption
- more expensive
- physically larger in size
- full range of addressing modes
- more intensive tasks suited
- RISC
- cheaper
- more RAM required
- smaller in size
- simpler circuit as registers are of the same size
- less energy consumption
- used in phones/tablets
- programs run faster due to simpler instructions
- co-processors
- used in floating point arithmetic
- additional processors used for specialised tasks
- purpose:
- increases the general speed of a computer system
- executes concurrently with the main CPU
- e.g. maths co-processor
- carried out calculations
- GPU e.g. graphics cards
- highly specialised in graphics
- contains built-in circuitry for common graphics operations
- other uses..
- linear algebra
- oil exploration
- machine learning
- SIMD
- better for simple operations on large data sets (CPU general purpose --
better for complex operations on small data sets)
why are supercomputers good?
- CPUs can work in parallel on the same problem
- multiple keys can be assembled simultaneously to break codes
multi-core:
- contains two or more independent processing units
- each carry out their own FDE cycle
1.1.1 structure and function of the processor
CU: control unit
- deals with interrupts
- sends read/write requests
- sends control signals to other parts of the CPU
- contains the clock which coordinates CPU activity
ALU: arithmetic logic unit
- carries out calculations and other logical operations
ACC: holds the result of calculations
PC: holds the address of the next instruction + value sent to MAR
MDR: contains the data that has been fetched from or is about to be stored in memory +
contents copied to CIR
MAR: contains the address of data that must be fetched from or sent to memory - sent by
the PC
CIR: stores the most recently fetched instruction/stores instruction currently being
processed
registers: a superfast form of memory used to store data
buses..
- control
- provides control signals to cause memory or input/output to perform a
read/write operation
- data
- carries the data
- address
- provides memory address to system memory or input/output devices
FDE cycle:
- fetch…
- PC copies the address of the instruction to MAR
- CU loads the address to be used on the address bus
- CU triggers a read signal down the control bus which causes RAM to place
the instruction being asked for on the data bus
- data bus’ instruction copied into the MDR
- MDR copies instruction to the CIR
- PC incremented
, - decode…
- CIR contents sent to the CU which decodes the instruction
- execute..
- the instruction is executed
factors affecting CPU performance..
- cache size
- small and very fast memory built into the CPU
- holds the instructions or data frequently used, recently used or about to be
used
- expensive
- clock speed
- increases the number of instructions that can be executed per second
- “overclocking” -- overheating the CPU can cause damage
- number of cores
- each core can independently carry out FDE
- multiple instructions can be processed at the same time
pipelining: fetching an instruction whilst prev is being decoded whilst prev is being
executed
- pipeline controller has to predict jump instructions to keep pipe full -- if the
controller makes a mistake the pipelines have to be flushed which degrades
performance
Von Neumann:
- single ALU
- single CU
- works sequentially through instructions
- instructions and data stored in the same memory unit
- simpler operating system
- slower than array processing on large data sets
Harvard:
- memory is split into two parts
- data and programs
- more expensive + harder to program
modern architecture uses parallel processing
- pipelining
- array processing
- SIMD --- i.e. GPU
- a number of ALUs allow one instruction to be performed on a large data set
simultaneously
- multicore processing
- MIMD
, - each CPU has multiple cores or each computer has multiple CPUs (i.e. a
supercomputer)
types of processors:
- CISC
- more complex hardware due to different sized registers
- greater energy consumption
- more expensive
- physically larger in size
- full range of addressing modes
- more intensive tasks suited
- RISC
- cheaper
- more RAM required
- smaller in size
- simpler circuit as registers are of the same size
- less energy consumption
- used in phones/tablets
- programs run faster due to simpler instructions
- co-processors
- used in floating point arithmetic
- additional processors used for specialised tasks
- purpose:
- increases the general speed of a computer system
- executes concurrently with the main CPU
- e.g. maths co-processor
- carried out calculations
- GPU e.g. graphics cards
- highly specialised in graphics
- contains built-in circuitry for common graphics operations
- other uses..
- linear algebra
- oil exploration
- machine learning
- SIMD
- better for simple operations on large data sets (CPU general purpose --
better for complex operations on small data sets)
why are supercomputers good?
- CPUs can work in parallel on the same problem
- multiple keys can be assembled simultaneously to break codes
multi-core:
- contains two or more independent processing units
- each carry out their own FDE cycle
