System Architecture
Purpose ofthe CPK
·
The the CPI to data and instructions
purpose of is
process
Itis the
where all
searching, sorting, calculating and decision
making takes place in the
computer
The CPU will issue instructions devices
·
to other depending
the the
results
processing
on of
FDE Cycle Stages of FDE Cycl
Fetch Fetch
·
·
The value in PC is spied to the
Execute Decode MAR the
I
using address in the
MAR data/instructions are fetched
from main memory and stored in
te MDR
·
PC is incremented
Decode
scecute
E
The Instruction MDR
·
in the is
The Instruction
·
decoded the is
by control unit into
performed.
Ifthe
an
operator and
operand instruction involves a
calculation then
or
logic operation
the arithmetic unitis
logic
FDE Cycle Registers responsible for this
-
·
The Resultis stored in the
Program Counter PC accumulator
stores the
·
address of next
Memory Data (MDR)
instruction increments By I each
Register
loop of the FDE cycle
·
Holds the data/instruction
which nas been fetched
Memory Address
Register (MAR) from main memory
·
Stores the address ofthe Accumulator (ACC)
instruction to be fetched or
Holds the
·
written intermediate results
from calculation after decoding
and execution
Purpose ofthe CPK
·
The the CPI to data and instructions
purpose of is
process
Itis the
where all
searching, sorting, calculating and decision
making takes place in the
computer
The CPU will issue instructions devices
·
to other depending
the the
results
processing
on of
FDE Cycle Stages of FDE Cycl
Fetch Fetch
·
·
The value in PC is spied to the
Execute Decode MAR the
I
using address in the
MAR data/instructions are fetched
from main memory and stored in
te MDR
·
PC is incremented
Decode
scecute
E
The Instruction MDR
·
in the is
The Instruction
·
decoded the is
by control unit into
performed.
Ifthe
an
operator and
operand instruction involves a
calculation then
or
logic operation
the arithmetic unitis
logic
FDE Cycle Registers responsible for this
-
·
The Resultis stored in the
Program Counter PC accumulator
stores the
·
address of next
Memory Data (MDR)
instruction increments By I each
Register
loop of the FDE cycle
·
Holds the data/instruction
which nas been fetched
Memory Address
Register (MAR) from main memory
·
Stores the address ofthe Accumulator (ACC)
instruction to be fetched or
Holds the
·
written intermediate results
from calculation after decoding
and execution
