COMPUTER SCIENCE
GCSE OCR Computer Science Condensed Notes
,Table of Contents
1 Unit 1 – Computer Systems
4 Unit 2 – Networks
10 Unit 3 – System Software& Security
12 Unit 4 – Ethics
13 Unit 5 – Algorithms
16 Unit 6 – Programming
19 Unit 7 – Logic & Languages
22 Unit 8 – Data Representation
© 2021
This document is the sole property of the author.
The author reserves all rights and privileges regarding the use of this document.
Any unauthorized use, such as distributing, copying, modifying, or reprinting, is not permitted.
This document is not intended for reproduction.
To obtain permission to reproduce or distribute this document contact the author at
, GCSE OCR Computer Science Condensed Notes Unit 1 – Computer Systems
Computer Components
Central Processing Unit
Before 1943, early computers stored the data to be worked on in memory, and programs were not stored –
instructions had to be input one at a time using switches or read in from paper tape.
− Computer programs and the data used are stored in the same memory;
- Data then moves between the memory unit and the processor. This is the Fetch-Decode-Execute
Cycle (FDE).
Components of the CPU
− Control Unit
- Coordinates all of the activities taking place within the CPU.
− Arithmetic Logic Unit (ALU)
- Component of the processor where all calculations take place.
− Registers
- Registers are very fast memory locations
- Program Counter (PC)
- Holds the address of the next instruction to be executed
- Memory Address Register (MAR)
- Holds the memory address of the current instruction, and then the data that it uses, so that
it can be fetched from the memory
- Memory Data Register (MDR)
- Holds the actual instruction and then the data that has been fetched from memory
- Accumulator
- Hold the result of an instruction before transferring it to memory.
Memory Address Register & Memory Data Register (MAR & MDR)
− In the FETCH stage of the FDE cycle, the PC copies the address of the instructions to be executed to the MAR.
− The instructions at that address are fetched and copied to the MDR.
− The Control Unit decodes the instruction and decides if data needs to be fetched.
− If data is required, the MAR is used to hold the address of data to be used in the instruction.
− Said data is fetched and copied to the MDR.
Figure 1 Figure 2 Figure 3
Fetch-Decode-Execute Central Processing Unit Input, Output & Components of the CPU
(FDR Cycle) Processes
1
GCSE OCR Computer Science Condensed Notes
,Table of Contents
1 Unit 1 – Computer Systems
4 Unit 2 – Networks
10 Unit 3 – System Software& Security
12 Unit 4 – Ethics
13 Unit 5 – Algorithms
16 Unit 6 – Programming
19 Unit 7 – Logic & Languages
22 Unit 8 – Data Representation
© 2021
This document is the sole property of the author.
The author reserves all rights and privileges regarding the use of this document.
Any unauthorized use, such as distributing, copying, modifying, or reprinting, is not permitted.
This document is not intended for reproduction.
To obtain permission to reproduce or distribute this document contact the author at
, GCSE OCR Computer Science Condensed Notes Unit 1 – Computer Systems
Computer Components
Central Processing Unit
Before 1943, early computers stored the data to be worked on in memory, and programs were not stored –
instructions had to be input one at a time using switches or read in from paper tape.
− Computer programs and the data used are stored in the same memory;
- Data then moves between the memory unit and the processor. This is the Fetch-Decode-Execute
Cycle (FDE).
Components of the CPU
− Control Unit
- Coordinates all of the activities taking place within the CPU.
− Arithmetic Logic Unit (ALU)
- Component of the processor where all calculations take place.
− Registers
- Registers are very fast memory locations
- Program Counter (PC)
- Holds the address of the next instruction to be executed
- Memory Address Register (MAR)
- Holds the memory address of the current instruction, and then the data that it uses, so that
it can be fetched from the memory
- Memory Data Register (MDR)
- Holds the actual instruction and then the data that has been fetched from memory
- Accumulator
- Hold the result of an instruction before transferring it to memory.
Memory Address Register & Memory Data Register (MAR & MDR)
− In the FETCH stage of the FDE cycle, the PC copies the address of the instructions to be executed to the MAR.
− The instructions at that address are fetched and copied to the MDR.
− The Control Unit decodes the instruction and decides if data needs to be fetched.
− If data is required, the MAR is used to hold the address of data to be used in the instruction.
− Said data is fetched and copied to the MDR.
Figure 1 Figure 2 Figure 3
Fetch-Decode-Execute Central Processing Unit Input, Output & Components of the CPU
(FDR Cycle) Processes
1
