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Examen

CPSC 351 Study Guide with Complete Solutions

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Publié le
05-03-2025
Écrit en
2024/2025

CPSC 351 Study Guide with Complete Solutions

Établissement
CPSC
Cours
CPSC

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CPSC 351 Study Guide with Complete Solutions
_______ is copying information into faster storage system; main memory can be viewed
as a cache for secondary storage. - ANSWER-Caching

___________ is more efficient than interrupt-driven or programmed I/O for a multiple-
word I/O transfer. - ANSWER-Direct memory access

(True or False) An OS uses a PCB to represent a process. Follow-up: What is a PCB? -
ANSWER-True, Process Control Block

(True or False) The PCB becomes part of the program executed by a process. -
ANSWER-False

(True or False) The PCB is created by the process when execution starts. - ANSWER-
False, process is created when it is in the "new" part of the cycle, execution means that
it isn't new and is already running

(True or False) Two processes can be executing the same program - ANSWER-True,
programs can be executed concurrently through fork()

A _______ organization has a number of potential advantages over a uniprocessor
organization including performances, availability, incremental growth, and scaling. -
ANSWER-symmetric multiprocessor

A _____________ computer combines two or more processors on a single piece of
silicon. - ANSWER-multicore

A context switch may occur at any time, that means the OS has gained control from the
currently running process. (T/F) - ANSWER-F (Maybe)

A Control/Status register that contains the address of the next instruction to be fetched
is called the _________. - ANSWER-Program Counter (PC)

A preemptive process is be more responsive (T/F) (20 points) - ANSWER-T (Maybe)

A process is a grouping of resources: an address space, open files, signal handlers,
and one or more threads. A thread is just an execution unit. (T/F) - ANSWER-True

A small piece of code known as the _________ locates the kernel, loads it into main
memory, and starts its execution - ANSWER-bootstrap program

A special type of address register required by a s system that implements user visible
stack addressing is called a ________________. - ANSWER-stack pointer

,A system bus transfers data between the computer and its external environment. (T/F) -
ANSWER-False

A thread shares process' resources with...
A) other processes
B) other similar thread across the system
C) other threads within the same process
D) other threads inside similar processes
E) with no one. - ANSWER-C) other threads within the same process

An example of a multicore system is the Intel core i7. (T/F) - ANSWER-True

An SMP can be defined as a stand-alone computer system with two or more similar
processors of comparable capability. (T/F) - ANSWER-False

Application Programming Interface (API) - ANSWER-The API specifies a set of
functions that are available to an application programmer, including the parameters that
are passed to each function and the return values the programmer can expect.
Without API we can't access certain data (metadata).

Assume that code segments "produce data item", "place data into buffer", "remove data
from buffer", and "process data" happen at the same time. Which code segments
exeucte concurrently? - ANSWER-1st cycle: producer: fills up buffer, consumer: does
nothing. | 2nd cycle: producer: fills up buffer 2: consumer: processes buffer 1. | 3rd
Cycle: producer: fills up buffer 3, consumer: processes Buffer 2. | 4th Cycle: producer:
does nothing, consumer: processes buffer 3.

Asymmetric multiprocessing - ANSWER-Only one processor accesses the system data
structures, alleviating the need for data sharing.

Benefits of multi-threading
A) Resource usage
B) Increased interrupts
C) Unsuitability
D) Reduced procrastination
E) Reduced interrupts
F) Response time
G) Cost-saving
H) Scalability - ANSWER-A) Resource usage
F) Response time
G) Cost-saving
H) Scalability

By design, threads can only execute different functions/parts of the program code at the
same time. (T/F) - ANSWER-False

, Communications - ANSWER-◦ create, delete communication connection
◦ send, receive messages
◦ transfer status information
◦ attach or detach remote devices

Compiled code addressed bind to relocatable addresses and they can happen at three
different stages. What are these three different stages? - ANSWER-Compile time: if
memory location is known, aboslute code can be generated. Load time: must generate
relocatable code if memory location is not known at compile time. Execution time:
Binding delayed until run time if the process can be moved during execution

CreateProcess steps: - ANSWER-1. Create and initialize the process control block
(PCB) in the kernel.
2. Create and initialize a new address space.
3. Load the program prog into the address space.
4. Copy arguments args into memory in the address space.
5. Initialize the hardware context to start execution at "start".
6. Inform the scheduler that the new process is ready to run.

Define the solution for scheduler activations. - ANSWER-Scheduler activations provide
upcalls - a communication mechanism from the kernel to the thread library. Maintains
the correct number of kernel threads.

Define the solution for thread cancellation. - ANSWER-Asynchronous cancellation
terminates the target immediately. Defferred cancellation allows the target thread to
periodically check if it should be cancelled

Define the solution of signal handling - ANSWER-Signal Handler processes signals
generated by a particular event, delivered to a process

Describe the 4 steps taken by a kernel to context-switch between processes -
ANSWER-1) save cpu state of current executing process into a PCB 2) select another
process
3) use saved PCB of selected process to initialize CPU
4) let seleected process resume execution

Describe the three multi-threading models. - ANSWER-Many-to-one: many user level
threads mapped to a single kernel thread. One-to-one: each user-level thread maps to
kernel thread. Many-to-Many: many user threads mapped to many kernel threads

Device Management - ANSWER-◦ request device, release device
◦ read, write, reposition
◦ get device attributes, set device attributes
◦ logically attach or detach devices

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Publié le
5 mars 2025
Nombre de pages
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Écrit en
2024/2025
Type
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