Oxford Cambridge and RSA
AS-Level OCR 2025 Computer Science Paper 1
Tuesday 13 May 2025 – Afternoon
AS Level Computer Science
H046/01 Computing principles
Time allowed: 1 hour 15 minutes
1 Turn over
, 2
DO NOT WRITE ON THIS PAGE
© OCR 2025
, 3
1 The table shows the steps of the Fetch stage only of the Fetch-Decode-Execute cycle. The
names of the registers are referred to as A, B, C and D.
1 The contents of the Register A are copied into the Register B.
2a RAM is read at the location specified by the Register B and its contents are copied into
the Register C.
2b Register A is incremented by 1.
3 The contents of the Register C are copied into the Register D.
(a) State the name of each register in the table.
Register A
Register B
Register C
Register D
[4]
(b) Describe how the performance of the Fetch-Decode-Execute cycle changes when increasing:
(i) The number of cores
..........................................................................................................................................................
...................................................................................................................................................................... [1]
(ii) The clock speed
..........................................................................................................................................................
...................................................................................................................................................................... [1]
© OCR 2025 Turn over
AS-Level OCR 2025 Computer Science Paper 1
Tuesday 13 May 2025 – Afternoon
AS Level Computer Science
H046/01 Computing principles
Time allowed: 1 hour 15 minutes
1 Turn over
, 2
DO NOT WRITE ON THIS PAGE
© OCR 2025
, 3
1 The table shows the steps of the Fetch stage only of the Fetch-Decode-Execute cycle. The
names of the registers are referred to as A, B, C and D.
1 The contents of the Register A are copied into the Register B.
2a RAM is read at the location specified by the Register B and its contents are copied into
the Register C.
2b Register A is incremented by 1.
3 The contents of the Register C are copied into the Register D.
(a) State the name of each register in the table.
Register A
Register B
Register C
Register D
[4]
(b) Describe how the performance of the Fetch-Decode-Execute cycle changes when increasing:
(i) The number of cores
..........................................................................................................................................................
...................................................................................................................................................................... [1]
(ii) The clock speed
..........................................................................................................................................................
...................................................................................................................................................................... [1]
© OCR 2025 Turn over
