WGU C952 Computer Architecture Exam Questions And Correct Answers || 100% Pass | Verified Exam

WGU C952 Computer Architecture Exam Questions And Correct Answers || 100% Pass | Verified Exam WGU Computer Architecture RAID Redundant Array of Inexpensive Disks RAID 0 -Striped disks -Data is split evenly between two or more disks -Large size and fastest speed -No Redundancy -If one or more drives fail, you get an array failure RAID 1 -Mirrored disks -Two or more drives have identical data on them -A single drive failure will not result in data loss -speed and size is limited by the slowest and smallest disk RAID 2 -Bit level striping -some disks storing error checking and correcting (ECC) information -Not often used RAID 3 -Striped set with dedicated parity -Data is split evenly between two or more disks, plus a drive for dedicated parity storage -High speeds for sequential read/write operations -Poor performance for multiple simultaneous instructions -A single drive failure will rebuild RAID 4 -Block-level striping with dedicated parity -Multiple blocks across multiple disks with separate, dedicated disks solely for parity information -Not often used. RAID 5 -Striped disks with distributed parity -Data is split evenly between three or more disks, parity is split between disks -Large size, fast speed, and redundancy -Total array size is reduced by parity -a single drive failure will rebuild RAID 6 -Disk striping with extra parity. -Requires five or more drives -can lose up to two drives at once and your data is still protected. Abstraction a simplified representation of something more complex. Allows you to hide details to help you manage complexity, focus on relevant concepts, and reason about problems at a higher level. Active matrix display A liquid crystal display using a transistor to control the transmission of light at each individual pixel. Address A value used to delineate the location of a specific data element within a memory array address translation/address mapping The process by which a virtual address is mapped to an address used to access memory. Aliasing A situation in which two addresses access the same object; it can occur in virtual memory when there are two virtual addresses for the same physical page. Arithmetic Logic Unit (ALU) Hardware that performs addition, subtraction, and usually logical operations such as AND and OR. Amdahl's Law A rule stating that the performance enhancement possible with a given improvement is limited by the amount that the improved feature is used. It is a quantitative version of the law of diminishing returns. Assembler A program that translates a symbolic version of instructions into the binary version Assembly language A symbolic representation of machine instructions. Base address starting address of an array in memory (5000 below) Base register register that holds an array's base address (X22 below) Block (or line) The minimum unit of information that can be either present or not present in a cache. Blocking a failure to retrieve information that is available in memory even though you are trying to produce it Branch instruction an instruction that tells a program to go to a different section of code Untaken branch A branch where the branch condition is false and the program counter (PC) becomes the address of the instruction that sequentially follows the branch. branch prediction A method of resolving a branch hazard that assumes a given outcome for the branch and proceeds from that assumption rather than waiting to ascertain the actual outcome. Branch taken