©Jason McConnel 2025 ALL RIGHTS RESERVED.
CEA201 Exam Questions With Correct
Answers A+
The cache is responsible for...?
A. speeding up the operation and processing of the computer.
B. the cache is responsible for slowing down computer operations and processing.
C. storing most of the computer's data.
D. restoring the original settings of the computer. - Answer✔A
Choose the wrong answer Method of Accessing Units of Data have...?
A. Memory is organized into units of data called records
B. Access time is variable
C. Access time is fixed
D. Access must be made in a specific linear sequence - Answer✔C
Design constraints on a computer's memory can be summed up by three questions:
A. How much? How fast? How expensive?
B. How much? How far? How expensive?
C. How much? How long? How expensive?
D. How many? How fast? How expensive? - Answer✔A
We was learned about diagram Memory Hierarchy. In inboard memory have:
A. Registers, cache, DVD-RAM
B. Registers, cache, main memory
C. CD-ROM, cache, main memory
D. Registers, cache, magnetic tape - Answer✔B
What is RA mean?
A. Read Address
, ©Jason McConnel 2025 ALL RIGHTS RESERVED.
B. Read Assignments
C. Remember Address
D. Remember Assignments - Answer✔A
What is Volatile memory?
A. Information decays naturally or is lost when electrical power is switched off
B. May be either volatile or nonvolatile
C. Once recorded, information remains without deterioration until deliberately changed
D. A place to store all computer data - Answer✔A
__________ refers to whether memory is internal or external to the computer.
A. Location
B. Access
C. Hierarchy
D. Tag - Answer✔A
A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk
is referred to as a _________.
A. Disk cache
B. Latency
C. Virtual address
D. Miss - Answer✔A
The cache memory is used by the computer's central processing unit (CPU) for what?
A. to minimize the average time in accessing data in main memory
B. to minimize the average time in processing information of the CPU
C. to increase the capacity of main memory
D. to increase the efficiency of the graphics processor - Answer✔A
A line includes a _________ that identifies which particular block is currently being stored.
A. Cache
B. Hit
C. Tag
D. Locality - Answer✔C
, ©Jason McConnel 2025 ALL RIGHTS RESERVED.
The key advantage of the __________ design is that it eliminates contention for the cache
between the instruction fetch/decode unit and the execution unit
.A. Logical cache
B. Split cache
C. Unified cache
D. Physical cache - Answer✔B
A logical cache stores data using __________
A. Physical addresses
B. Virtual addresses
C. Random addresses
D. None of the above - Answer✔B
In reference to access time to a two-level memory, a _________ occurs if an accessed word is
not found in the faster memory?
A. Miss
B. Hit
C. Line
D. Tag - Answer✔A
When using the __________ technique all write operations made to main memory are made to
the cache as well.
A. Write back
B. LRU
C. Write through
D. Unified cache - Answer✔C
__________ is the simplest mapping technique and maps each block of main memory into only
one possible cache line.
A. Direct mapping
B. Associative mapping
C. Set associative mapping
D. None of the above - Answer✔A
The ________ consists of the access time plus any additional time required before a second
access can commence.
, ©Jason McConnel 2025 ALL RIGHTS RESERVED.
A. Latency
B. Memory cycle time
C. Direct access
D. Transfer rate - Answer✔B
The transfer between CPU and Cache is ______________
A. Block transfer
B. Word transfer
C. Set transfer
D. Associative transfer - Answer✔B
For random-access memory, __________ is the time from the instant that an address is presented
to the memory to the instant that data have been stored or made available for use.
A. Memory cycle time
B. Direct access
C. Transfer rate
D. Access time - Answer✔D
individual blocks or records have a unique address based on physical location with __________
A. Associative
B. Physical access
C. Direct access
D. Sequential access - Answer✔C
Internal memory capacity is typically expressed in terms of ______
A. Hertz
B. Nanos
C. Bytes
D. LOR - Answer✔C
The ________ enables the RAM chip to preposition bits to be placed on the databus as rapidly as
possible.
A. Flash memory
B. Hamming code
C. RamBus
CEA201 Exam Questions With Correct
Answers A+
The cache is responsible for...?
A. speeding up the operation and processing of the computer.
B. the cache is responsible for slowing down computer operations and processing.
C. storing most of the computer's data.
D. restoring the original settings of the computer. - Answer✔A
Choose the wrong answer Method of Accessing Units of Data have...?
A. Memory is organized into units of data called records
B. Access time is variable
C. Access time is fixed
D. Access must be made in a specific linear sequence - Answer✔C
Design constraints on a computer's memory can be summed up by three questions:
A. How much? How fast? How expensive?
B. How much? How far? How expensive?
C. How much? How long? How expensive?
D. How many? How fast? How expensive? - Answer✔A
We was learned about diagram Memory Hierarchy. In inboard memory have:
A. Registers, cache, DVD-RAM
B. Registers, cache, main memory
C. CD-ROM, cache, main memory
D. Registers, cache, magnetic tape - Answer✔B
What is RA mean?
A. Read Address
, ©Jason McConnel 2025 ALL RIGHTS RESERVED.
B. Read Assignments
C. Remember Address
D. Remember Assignments - Answer✔A
What is Volatile memory?
A. Information decays naturally or is lost when electrical power is switched off
B. May be either volatile or nonvolatile
C. Once recorded, information remains without deterioration until deliberately changed
D. A place to store all computer data - Answer✔A
__________ refers to whether memory is internal or external to the computer.
A. Location
B. Access
C. Hierarchy
D. Tag - Answer✔A
A portion of main memory used as a buffer to hold data temporarily that is to be read out to disk
is referred to as a _________.
A. Disk cache
B. Latency
C. Virtual address
D. Miss - Answer✔A
The cache memory is used by the computer's central processing unit (CPU) for what?
A. to minimize the average time in accessing data in main memory
B. to minimize the average time in processing information of the CPU
C. to increase the capacity of main memory
D. to increase the efficiency of the graphics processor - Answer✔A
A line includes a _________ that identifies which particular block is currently being stored.
A. Cache
B. Hit
C. Tag
D. Locality - Answer✔C
, ©Jason McConnel 2025 ALL RIGHTS RESERVED.
The key advantage of the __________ design is that it eliminates contention for the cache
between the instruction fetch/decode unit and the execution unit
.A. Logical cache
B. Split cache
C. Unified cache
D. Physical cache - Answer✔B
A logical cache stores data using __________
A. Physical addresses
B. Virtual addresses
C. Random addresses
D. None of the above - Answer✔B
In reference to access time to a two-level memory, a _________ occurs if an accessed word is
not found in the faster memory?
A. Miss
B. Hit
C. Line
D. Tag - Answer✔A
When using the __________ technique all write operations made to main memory are made to
the cache as well.
A. Write back
B. LRU
C. Write through
D. Unified cache - Answer✔C
__________ is the simplest mapping technique and maps each block of main memory into only
one possible cache line.
A. Direct mapping
B. Associative mapping
C. Set associative mapping
D. None of the above - Answer✔A
The ________ consists of the access time plus any additional time required before a second
access can commence.
, ©Jason McConnel 2025 ALL RIGHTS RESERVED.
A. Latency
B. Memory cycle time
C. Direct access
D. Transfer rate - Answer✔B
The transfer between CPU and Cache is ______________
A. Block transfer
B. Word transfer
C. Set transfer
D. Associative transfer - Answer✔B
For random-access memory, __________ is the time from the instant that an address is presented
to the memory to the instant that data have been stored or made available for use.
A. Memory cycle time
B. Direct access
C. Transfer rate
D. Access time - Answer✔D
individual blocks or records have a unique address based on physical location with __________
A. Associative
B. Physical access
C. Direct access
D. Sequential access - Answer✔C
Internal memory capacity is typically expressed in terms of ______
A. Hertz
B. Nanos
C. Bytes
D. LOR - Answer✔C
The ________ enables the RAM chip to preposition bits to be placed on the databus as rapidly as
possible.
A. Flash memory
B. Hamming code
C. RamBus
