CPEN 4700 Exam 3 Review Questions And
100% Correct Answers
interrupts
Exceptions caused by hardware devices.
Interrupts must be handled transparently
The currently running process must not "notice" that an interrupt occurs, except for the
time lag involved in servicing it.
The possible problem in code for interrupts
It could occur after a computation determines condition code/status flag bits, but before
a condition is evaluated.
Interrupt Request (IRQ)
There is a hard-wired connection from the device to an interrupt request pin in the CPU
chip. Bringing the signal to the active level initiates a(n) ____________.
atoms True
(T/F) The system will respond to the interrupt request if interrupts are currently disabled
and if the request is of sufficient priority.
False
priority scheme
Any system that has more than one level (category) of hardware interrupts is going to
,have to have some ____________ in place.
maskable interrupt
can be disabled, (and later re-enabled) under software control, (normally
enabling/disabling interrupts is a privileged operation.).
nonmaskable interrupt
Cannot be disabled. The highest-priority interrupt in the system.
The CPU reset pin can be thought of as a _____________, but the desired next state is an
inialized system rather than resumption of the previously running code.
nonmaskable interrupt
1 multiple choice option
watchdog timers
It provides a constantly running count register, often based on the system clock during
the time that the system is operating. It can count up through a maximum value or down
through a minimum value. Software operating in the system should periodically restart
the counter before the counter reaches its terminal value.
For a watchdog timer, if a catastrophic software or hardware failure should occur such
that the system locks up,.
the periodic restarting of the timer will not occur. Here the counter enters the terminal
value-reaches the threshold value at the upper or lower count limit-which indicates that
a watchdog timeout has occurred. The logic recognizes the arrival of the watchdog
timer counter to its terminal state and initiates a machine reset accordingly.
Nonvectored interrupts
,just provide a fixed location in memory where the interrupt handler code should go;
when an interrupt occurs, set the PC to point there. Done.
vectored interrupts
The CPU, having accepted an interrupt at a particular priority level, expects the
interrupting device to identify itself by placing its device number onto the system bus.
This number is then used in an interrupt vector table to point to a separate handler.
Highly flexible solution at the expense of some additional complexity in the hardware.
Autovectcored interrupts
CPU generates the vector number internally, solely based on the priority level of the
interrupt. Rest of the process is same as vectored interrupt.
interrupt vector table
Each table entry contains starting location of interrupt handler specific to
corresponding interrupt source.
FIQ in ARM
It does not save the CPU state, and uses additional registers instead. The service
routine for ____________ is situated right after the end of the look up table, so program
flow can continue with no branch necessary.
traps (system call)
Machine instructions that can simulate the occurrence of a hardware interrupt from a
device.
True/False Traps can be conditional or unconditional.
true
True/False Traps can be conditional but not unconditional.
False
, Because interrupts and traps are handled in a higher privilege level than application
programs,
user code can request services - such as I/O, memory allocation, file access, etc., - that
only can be directly accessed with system privileges.
In general,
Not only do traps enable a program to obtain service from routines that need a higher
privilege level to execute, but
they also imply that the program does not need to know the location of the code
providing a particular service.
Since traps occur at predictable points within program execution.
it may not be necessary to save the complete machine state.
faults
more serious than traps because they result from something the running process has
done wrong (or that cannot be be completed without help from the OS).
In the event of an error or fault.
The running process is suspended so that the error condition can be addressed.
If a fault or error is serious and/or cannot be resolved.
The OS may terminate the fault processing.
Page or segment fault
Name some faults or errors
1. Division by zero
2. Undefined op code
100% Correct Answers
interrupts
Exceptions caused by hardware devices.
Interrupts must be handled transparently
The currently running process must not "notice" that an interrupt occurs, except for the
time lag involved in servicing it.
The possible problem in code for interrupts
It could occur after a computation determines condition code/status flag bits, but before
a condition is evaluated.
Interrupt Request (IRQ)
There is a hard-wired connection from the device to an interrupt request pin in the CPU
chip. Bringing the signal to the active level initiates a(n) ____________.
atoms True
(T/F) The system will respond to the interrupt request if interrupts are currently disabled
and if the request is of sufficient priority.
False
priority scheme
Any system that has more than one level (category) of hardware interrupts is going to
,have to have some ____________ in place.
maskable interrupt
can be disabled, (and later re-enabled) under software control, (normally
enabling/disabling interrupts is a privileged operation.).
nonmaskable interrupt
Cannot be disabled. The highest-priority interrupt in the system.
The CPU reset pin can be thought of as a _____________, but the desired next state is an
inialized system rather than resumption of the previously running code.
nonmaskable interrupt
1 multiple choice option
watchdog timers
It provides a constantly running count register, often based on the system clock during
the time that the system is operating. It can count up through a maximum value or down
through a minimum value. Software operating in the system should periodically restart
the counter before the counter reaches its terminal value.
For a watchdog timer, if a catastrophic software or hardware failure should occur such
that the system locks up,.
the periodic restarting of the timer will not occur. Here the counter enters the terminal
value-reaches the threshold value at the upper or lower count limit-which indicates that
a watchdog timeout has occurred. The logic recognizes the arrival of the watchdog
timer counter to its terminal state and initiates a machine reset accordingly.
Nonvectored interrupts
,just provide a fixed location in memory where the interrupt handler code should go;
when an interrupt occurs, set the PC to point there. Done.
vectored interrupts
The CPU, having accepted an interrupt at a particular priority level, expects the
interrupting device to identify itself by placing its device number onto the system bus.
This number is then used in an interrupt vector table to point to a separate handler.
Highly flexible solution at the expense of some additional complexity in the hardware.
Autovectcored interrupts
CPU generates the vector number internally, solely based on the priority level of the
interrupt. Rest of the process is same as vectored interrupt.
interrupt vector table
Each table entry contains starting location of interrupt handler specific to
corresponding interrupt source.
FIQ in ARM
It does not save the CPU state, and uses additional registers instead. The service
routine for ____________ is situated right after the end of the look up table, so program
flow can continue with no branch necessary.
traps (system call)
Machine instructions that can simulate the occurrence of a hardware interrupt from a
device.
True/False Traps can be conditional or unconditional.
true
True/False Traps can be conditional but not unconditional.
False
, Because interrupts and traps are handled in a higher privilege level than application
programs,
user code can request services - such as I/O, memory allocation, file access, etc., - that
only can be directly accessed with system privileges.
In general,
Not only do traps enable a program to obtain service from routines that need a higher
privilege level to execute, but
they also imply that the program does not need to know the location of the code
providing a particular service.
Since traps occur at predictable points within program execution.
it may not be necessary to save the complete machine state.
faults
more serious than traps because they result from something the running process has
done wrong (or that cannot be be completed without help from the OS).
In the event of an error or fault.
The running process is suspended so that the error condition can be addressed.
If a fault or error is serious and/or cannot be resolved.
The OS may terminate the fault processing.
Page or segment fault
Name some faults or errors
1. Division by zero
2. Undefined op code
