Edexcel A-Level Computer Science
2024 June exam Questions and
Answers 1.1
ALU - Answer>>arithmetic logic unit does arithmetic and logic
calculations
Control Unit - Answer>>control unit coordinates data flow and
translates instructions
Register - Answer>>a high-speed, highly accessible small
storage space
PC - Answer>>program counter stores address of next
instruction until machine is deactivated
ACC - Answer>>stores the immediate result of calculations
from the ALU
MAR - Answer>>stores the address that data has been
retrieved ffrom or will be sent to
MDR - Answer>>stores data ready for the CPU to use or to be
sent to the RAM
CIR - Answer>>Current instruction register-holds the address of
the current instruction being executed
Busses - Answer>>Cable for transfer of data between all
components of a computer
Data Bus - Answer>>Bus between MDR and RAM for transfer
of data
, Address Bus - Answer>>Bus between MAR and RAM for
transfer of data
Control Bus - Answer>>Bus between CPU and other
components for communicating commands
Fetch-Decode-Execute - Answer>>The process of the CPU for
fetching data from the RAM, decoding it into machine code, and
then executing the program described by the code
CPU - Answer>>Handles the instructions you give the computer
(interprets and executes instructions)
Clock Speed - Answer>>Operating speed of a given computer
(or microprocessor) in cycles per second (MHz)
Cores - Answer>>Is a processing unit that reads instructions to
perform specific actions and carry out instructions
Cache - Answer>>Also called CPU memory, a computer
microprocessor can access more quickly than regular RAM
Pipelining - Answer>>Technique to everlap execution of
different instructions. So when one executed the next is already
decoded.
Von Neumann Architecture - Answer>>The computer consists
of a CPU, memory and I/O devices. The program is stored in the
memory. The CPU fetches an instruction from the memory at a
time and executes it.
Harvard Architecture - Answer>>Architecture with physically
separate storage and signal pathways for instructions and data
2024 June exam Questions and
Answers 1.1
ALU - Answer>>arithmetic logic unit does arithmetic and logic
calculations
Control Unit - Answer>>control unit coordinates data flow and
translates instructions
Register - Answer>>a high-speed, highly accessible small
storage space
PC - Answer>>program counter stores address of next
instruction until machine is deactivated
ACC - Answer>>stores the immediate result of calculations
from the ALU
MAR - Answer>>stores the address that data has been
retrieved ffrom or will be sent to
MDR - Answer>>stores data ready for the CPU to use or to be
sent to the RAM
CIR - Answer>>Current instruction register-holds the address of
the current instruction being executed
Busses - Answer>>Cable for transfer of data between all
components of a computer
Data Bus - Answer>>Bus between MDR and RAM for transfer
of data
, Address Bus - Answer>>Bus between MAR and RAM for
transfer of data
Control Bus - Answer>>Bus between CPU and other
components for communicating commands
Fetch-Decode-Execute - Answer>>The process of the CPU for
fetching data from the RAM, decoding it into machine code, and
then executing the program described by the code
CPU - Answer>>Handles the instructions you give the computer
(interprets and executes instructions)
Clock Speed - Answer>>Operating speed of a given computer
(or microprocessor) in cycles per second (MHz)
Cores - Answer>>Is a processing unit that reads instructions to
perform specific actions and carry out instructions
Cache - Answer>>Also called CPU memory, a computer
microprocessor can access more quickly than regular RAM
Pipelining - Answer>>Technique to everlap execution of
different instructions. So when one executed the next is already
decoded.
Von Neumann Architecture - Answer>>The computer consists
of a CPU, memory and I/O devices. The program is stored in the
memory. The CPU fetches an instruction from the memory at a
time and executes it.
Harvard Architecture - Answer>>Architecture with physically
separate storage and signal pathways for instructions and data
