COMPUTER SCIENCE 7517/2 Paper 2 Mark scheme

COMPUTER SCIENCE 7517/2 Paper 2 Mark scheme June 2023 Version: 1.0 Final *236A7517/2/MS* Mark schemes are prepared by the Lead Assessment Writer and considered, together with the relevant questions, by a panel of subject teachers. This mark scheme includes any amendments made at the standardisation events which all associates participate in and is the scheme which was used by them in this examination. The standardisation process ensures that the mark scheme covers the students’ responses to questions and that every associate understands and applies it in the same correct way. As preparation for standardisation each associate analyses a number of students’ scripts. Alternative answers not already covered by the mark scheme are discussed and legislated for. If, after the standardisation process, associates encounter unusual answers which have not been raised they are required to refer these to the Lead Examiner. It must be stressed that a mark scheme is a working document, in many cases further developed and expanded on the basis of students’ reactions to a particular paper. Assumptions about future mark schemes on the basis of one year’s document should be avoided; whilst the guiding principles of assessment remain constant, details will change, depending on the content of a particular examination paper. Further copies of this mark scheme are available from Copyright information AQA retains the copyright on all its publications. However, registered schools/colleges for AQA are permitted to copy material from this booklet for their own internal use, with the following important exception: AQA cannot give permission to schools/colleges to photocopy any material that is acknowledged to a third party even for internal use within the centre. Copyright © 2023 AQA and its licensors. All rights reserved. Level of response marking instructions Level of response mark schemes are broken down into levels, each of which has a descriptor. The descriptor for the level shows the average performance for the level. There are marks in each level. Before you apply the mark scheme to a student’s answer read through the answer and annotate it (as instructed) to show the qualities that are being looked for. You can then apply the mark scheme. Step 1 Determine a level Start at the lowest level of the mark scheme and use it as a ladder to see whether the answer meets the descriptor for that level. The descriptor for the level indicates the different qualities that might be seen in the student’s answer for that level. If it meets the lowest level then go to the next one and decide if it meets this level, and so on, until you have a match between the level descriptor and the answer. With practice and familiarity you will find that for better answers you will be able to quickly skip through the lower levels of the mark scheme. When assigning a level you should look at the overall quality of the answer and not look to pick holes in small and specific parts of the answer where the student has not performed quite as well as the rest. If the answer covers different aspects of different levels of the mark scheme you should use a best fit approach for defining the level and then use the variability of the response to help decide the mark within the level, ie if the response is predominantly level 3 with a small amount of level 4 material it would be placed in level 3 but be awarded a mark near the top of the level because of the level 4 content. Step 2 Determine a mark Once you have assigned a level you need to decide on the mark. The descriptors on how to allocate marks can help with this. The exemplar materials used during standardisation will help. There will be an answer in the standardising materials which will correspond with each level of the mark scheme. This answer will have been awarded a mark by the Lead Examiner. You can compare the student’s answer with the example to determine if it is the same standard, better or worse than the example. You can then use this to allocate a mark for the answer based on the Lead Examiner’s mark on the example. You may well need to read back through the answer as you apply the mark scheme to clarify points and assure yourself that the level and the mark are appropriate. Indicative content in the mark scheme is provided as a guide for examiners. It is not intended to be exhaustive and you must credit other valid points. Students do not have to cover all of the points mentioned in the Indicative content to reach the highest level of the mark scheme. An answer which contains nothing of relevance to the question must be awarded no marks. A-level Computer Science Paper 2 June 2023 The following annotation is used in the mark scheme: ; - means a single mark // - means alternative response / - means an alternative word or sub-phrase A. - means acceptable creditworthy answer R. - means reject answer as not creditworthy NE. - means not enough I. - means ignore DPT. - in some questions a specific error made by a candidate, if repeated, could result in the loss of more than one mark. The DPT label indicates that this mistake should only result in a candidate losing one mark on the first occasion that the error is made. Provided that the answer remains understandable, subsequent marks should be awarded as if the error was not being repeated. Examiners are required to assign each of the candidates’ responses to the most appropriate level according to its overall quality, then allocate a single mark within the level. When deciding upon a mark in a level examiners should bear in mind the relative weightings of the assessment objectives. eg In the following question, the marks available are as follows: Question 05.3 (max 2 marks) AO1 (understanding) – 1 mark AO2 (analysis) – 1 mark Question 07.3 (max 10 marks) AO2 (analysis) – 4 marks AO3 (programming) – 6 marks Question 11.3 (max 4 marks) AO1 (knowledge) – 2 marks AO1 (understanding) – 2 marks Question 11.4 (max 2 marks) AO1 (knowledge) – 1 mark AO1 (understanding) – 1 mark Qu Pt Marking guidance Total marks 01 1 All marks AO2 (apply) Award 2 marks for correct answer: 16.48 A. responses written correctly to more decimal places (16.) or as a fraction 16 491/1024 A. 48000 × 16 × 3 × 60 / 8 / 1024 / 1024 Award 1 mark for an answer written to 0 or 1 decimal places (16 or 16.5) or if truncated to 16.47 If answer is incorrect then award 1 method mark for doing at least three of: • multiplying by 48000 • multiplying by 16 • multiplying by 3 • multiplying by 60 • dividing by 8 • dividing by 1024 / 210 • dividing by 1024 / 210 a second time The following method points are equivalent to performing two of the method points in the list above: • multiplying by 180 • dividing by 2 • dividing by 1048576 / 220 Max 1 if answer is not correct and written to at least 2 decimal places 2 Qu Pt Marking guidance Total marks 01 2 Mark is AO2 (apply) Award 1 mark for correct answer: 30000 A. 15000 × 2, double 15000 1 Qu Pt Marking guidance Total marks 01 3 Mark is AO1 (knowledge) Digital to Analogue Converter A. DAC NE. Digital to Analogue R. Initialism and full name both given but do not match eg Digital to Analogue Converter (ADC) R. If two components named 1 Qu Pt Marking guidance Total marks 02 1 All marks AO1 (knowledge) Port number(s); A. destination port number and source port number as separate marks A. “port” as BOD Sequence number; A. packet number Time to live; A. TTL, maximum hop count Packet size/length; A. size Type of service; A. priority Protocol identifier; A. “protocol” as BOD Packet identifier/ID number; IP version; Options/Padding; Flags; Window size value; Fragment offset // header length; A. Total number of packets in message NE. Total number of packets A. Acknowledgement number Only mark first two responses Max 2 2 Qu Pt Marking guidance Total marks 02 2 All marks AO1 (understanding) Explain what the checksum is used for: To check if the contents of the packet/data have been corrupted/changed (during transmission) // to check if the received data is/is not the same as the transmitted data; A. “tampered” for “corrupted/changed” A. To check if an error has occurred during transmission A. To check if the data has been sent/transmitted correctly NE. To check if received/transmitted data is correct NE. To correct (some) errors in the received data NE. Error checking Outline how the checksum’s value will be determined: Calculated from the payload/data/contents (of the packet); A. Hash/apply a function to the payload/data/contents of the packet A. Explanation of a reasonable calculation that could be done NE. Explanation of a calculation that could not reasonably be performed to produce a useful checksum NE. “apply an algorithm to data” unless clear that this is mathematical, or produces a single value as an output I. Responses that go on to talk about a comparison being made using the checksum to check if the data is received correctly. 2 Qu Pt Marking guidance Total marks 02 3 All marks AO1 (understanding) Connects two networks together; NE. Connects a network to the Internet Note: Must be explicitly stated to award mark, not implied from other points Router determines which outgoing link to send packet along // determines which router/host/node to send packet to next; NE. Router determines where to send packet next NE. Router determines next hop R. Responses which suggest a router always sends the packet to the final destination Router uses most efficient/shortest/cheapest/best path to the destination; Router (monitors the network and) updates routes/routing table to reflect congestion/failure/network changes; A. Congestion management as BOD Router modifies the (MAC/hardware) addresses for the next hop // router modifies the (MAC/hardware) addresses to get to the next router; R. IP addresses A. To remove packets that have no time to live // have reached the maximum hop count Max 2 2 Qu Pt Marking guidance Total marks 03 1 Mark is AO2 (apply) WIGYVMXC; I. case 1 Qu Pt Marking guidance Total marks 03 2 Mark is AO1 (understanding) Each letter/character is always encrypted to the same letter/character; The letters/characters in the ciphertext will have the same frequency as their corresponding letters/characters in the plaintext (allowing the correspondence to be worked out given enough ciphertext); A. The ciphertext is susceptible to frequency analysis NE. Patterns in the text can be identified The ciphertext will retain structural properties of the plaintext message; A. Examples of structural properties, eg some letters frequently occur next to each other, some letters rarely appear next to each other, position of spaces can identify word lengths, common short words can be identified R. Susceptible to brute-force cracking techniques Max 1 1 Qu Pt Marking guidance Total marks 03 3 Mark is AO2 (analysis) There are more (possible) keys; It is not possible to work out how other letters/characters have been encrypted directly from the knowledge of how one letter/character has been encrypted; There is no pattern to the letter replacements; A. Letter replacements are not in alphabetical order A. Letter replacements in the cipher are random A. It is not the case that every letter has the same shift A. (Some) letters are shifted by different (A. random) amounts NE. Letters are encrypted randomly R. Each letter has a random key Note: “Random” must clearly relate to the letter replacement to award a mark Max 1 1 Qu Pt Marking guidance Total marks 03 4 All marks AO1 (understanding) The key must be (at least) as long as the data to be encrypted/plaintext; The key must not be reused // key must only be used once; NE. one time pad The key must be (truly) random; The key must be kept securely/not revealed/only known by user(s); A. The key must be destroyed after use as an alternative to the second or fourth mark points Max 2 2 Qu Pt Marking guidance Total marks 04 1 All marks AO1 (understanding) Level Description Mark Range 4 A line of reasoning has been followed to produce a 10–12 coherent, relevant, substantiated and logically-structured response. The response covers both areas indicated in the guidance below and, in each area, there is sufficient detail to show that the student has a good level of understanding. 3 A line of reasoning has been followed to produce a 7–9 coherent, relevant, substantiated and logically structured response which shows a good level of understanding of at least one area indicated in the guidance below and some understanding of the other area. 2 A limited attempt has been made to follow a line of 4–6 reasoning and the response has a mostly logical structure. A good level of understanding has been shown of one area or some understanding of both areas. 1 A few relevant points have been made but there is no 1–3 evidence that a line of reasoning has been followed. There is insufficient evidence of a good level of understanding of either of the two areas. Guidance – Indicative Content Area 1: Fetch-Execute Cycle F-E Stage 1 Fetch: Contents of Program Counter/PC transferred to Memory Address Register/MAR R. If implied the instruction is stored in the PC Address bus used to transfer this address to main memory Read signal sent along control bus Transfer of main memory content uses the data bus Contents of addressed memory location loaded into the Memory Buffer Register/ MBR Increment (contents of) Program Counter/PC A. At any part of fetch process after transferring PC to MAR Increment Program Counter/PC and fetch instruction simultaneously Contents of MBR copied to CIR F-E Stage 2 Decode: Instruction to decode held by the (Current) Instruction Register/(C)IR The control unit decodes the instruction Instruction split into opcode and operand(s) 12 F-E Stage 3 Execute: If necessary, data is fetched/stored The opcode identifies the type of operation/instruction to be performed (by the processor) The operation (identified by the opcode) is performed by the control unit. ALU used for calculation/comparisons Result (may be) stored in register/main memory A. accumulator Status register updated If jump/branch required Program Counter/PC is updated Control bus will transfer signals to other components to initiate/sequence actions A good level of understanding would be demonstrated by a response that effectively covered all three stages of the cycle and did not focus excessively on one particular stage. There may be omissions, but these would not be of any key points. Any errors made would be minor. Area 2: Improving Hardware Replace the processor with one which has more cores A. Increase number of cores Replace the processor with one which has more cache memory // increase the amount of cache memory // add cache memory Increase clock speed of processor // replace the processor with one which runs at a faster clock speed NE. faster processor Use a parallel processor architecture // use more processors which can work in parallel Use a processor with a bigger word size Use a processor that makes (better) use of pipelining Install more RAM // main memory // primary memory Use RAM // main memory // primary memory with a faster access time Replace the motherboard with one which has buses which run at a faster clock speed A. increase bus clock speed Replace the motherboard with one which has more lines in data bus A. increase number of lines in data bus A. Replace HDDs with SSDs // replace HDDS with HDDs that can read data at a faster rate // replace SSDS with SSDs that can read data at a faster rate A. Use the Harvard architecture instead of the von Neumann architecture A good level of understanding would be demonstrated by a response that covered a range of hardware improvements that could be made (eg to the processor, buses, main memory) and did not focus excessively on only one component. Explanations of how a change would improve performance could be taken into account when considering how good the understanding is. Qu Pt Marking guidance Total marks 04 2 1 mark AO1 (knowledge) and one mark AO1 (understanding) 1 mark (knowledge): A signal/request sent to the processor (from a hardware device or program); Max 1 mark (understanding) from: So that a device/source that needs the (immediate) attention of the processor can be serviced/dealt with // so that an urgent error condition can be serviced/dealt with; A. Examples of error conditions that would be likely to generate an interrupt NE. To deal with an error, unless stated or clear from example that must be dealt with immediately NE. So that a task of higher priority can be carried out So that the currently executing process/task/program can be suspended; A. “stopped” as BOD R. Suspend/stop the fetch-execute cycle/processor R. “instruction” for “process” 2