WGU D120 COMPREHENSIVE STUDY GUIDE
2026 FULL QUESTIONS AND SOLUTIONS
GRADED A+
◍ superscalar.
Answer: Technique primarily associated with hardware.Functional units
(ALU, Floating Point Unit, Load/Store Unit) are duplicated in the pipeline
of a superscalar processor which allows the hardware to issue multiple
instructions to each unit simultaneously.
◍ Strong scaling.
Answer: Speed-up achieved on a multiprocessor without increasing the size
of the problem.
◍ Flash memory.
Answer: A nonvolatile semiconductor memory. It is cheaper and slower than
DRAM but more expensive per bit and faster than magnetic disks. Access
times are about 5 to 50 microseconds and cost per gigabyte in 2012 was
$0.75 to $1.00.
◍ virtually addressed cache.
Answer: A cache that is accessed with a virtual address rather than a
physical addressDoes not use the TLB
◍ overflow (floating point).
Answer: A situation in which a positive exponent becomes too large to fit in
the exponent field.
◍ cache ready signal.
Answer: set in the Compare Tag state if requested read or write is a hit
◍ condition codes (flag).
, Answer: 4 bits are usedIn MIPS, two registers are compared and the result
of the comparison is stored in a third register. Then a conditional branching
statement assess the value of the third register to see if the condition is true
or false.Negative (N)Zero (Z)Overflow (V)Carry (C)
◍ possession/control.
Answer: the physical disposition of the media on which the data is stored
◍ asymmetric key cryptography (public key cryptography).
Answer: this method uses 2 keys, a public key and a private key
◍ Tournament branch predictor.
Answer: A branch predictor with multiple predictions for each branch and a
selection mechanism that chooses which predictor to enable for a given
branch.
◍ Tomasulo's Algorithm.
Answer: An algorithm for dynamic scheduling and out-of-order
executionuses dynamic hazard detection, generalized forwarding, and
reservation stations.
◍ Program Counter (PC).
Answer: The register that contains the address of the next instruction to be
executed
◍ bounds checking.
Answer: to set a limit on the amount of data we expect to receive to set aside
storage for that data*required in most programming languages* prevents
buffer overflows
◍ Branch target buffer.
Answer: A structure that caches the destination PC or destination instruction
for a branch. It is usually organized as a cache with tags, making it more
costly than a simple prediction buffer.
◍ B.MI.
Answer: branch on minusN=1
,◍ violation.
Answer: the act of doing something that is prohibited by law or rule
◍ B.VS.
Answer: branch on overflow setV=1
◍ R-Format Instructions.
Answer: They all read two registers, perform an ALU operation on the
contents of the registers, and write the result to a register. We call these
instructions either R-type instructions or arithmetic-logical instructions
(since they perform arithmetic or logical operations). This instruction class
includes ADD, SUB, AND, and ORR, Need an ALU to operate on the
values read from the registers.
◍ Streaming processor (SP).
Answer: the primary thread instruction processor in the multiprocessor
◍ base register.
Answer: register that holds an array's base address (X22 below)
◍ CDC 6600.
Answer: This system is widely considered to have been the first
supercomputer. Also first load-store architecture
◍ Caesar cipher.
Answer: an ancient cryptographic technique based on transposition; involves
shifting each letter of a plaintext message by a certain number of letters
(historically 3)
◍ Wireshark.
Answer: a graphical interface protocol sniffing tool that is capable of
filtering, sorting, & analyzing both wired and wireless traffic- popular
troubleshooting tool
◍ Address.
Answer: A value used to delineate the location of a specific data element
within a memory array.
, ◍ stream cipher.
Answer: A type of cipher that encrypts each bit in the plaintext message, 1
bit at a time
◍ Data transfer instruction.
Answer: A command that moves data between memory and registers.
◍ MVZ.
Answer: move wide with zero
◍ confused deputy problem.
Answer: A type of attack that is more common in systems that use ACLs
rather than capabilities; - when software has greater permissions than user,
the user can trick the software into misusing authority
◍ rising clock edge.
Answer: 0 to 1
◍ Datapath.
Answer: The component of the processor that performs arithmetic
operations
◍ Pipeline stall (bubble).
Answer: a stall initiated in order to resolve a hazard
◍ exploits.
Answer: small bits of software that take advantage of flaws in
software/applications in order to cause them to behave in ways that were not
intended by their creators
◍ RAID 1 (mirroring).
Answer: Two drives are used in unison, and all data is written to both drives,
giving you a mirror or extra copy of the data, in the case that one drive fails
◍ vulnerability assessment.
Answer: An activity involving the careful examination of our environment
using vulnerability scanning tools in order to discover vulnerabilities
2026 FULL QUESTIONS AND SOLUTIONS
GRADED A+
◍ superscalar.
Answer: Technique primarily associated with hardware.Functional units
(ALU, Floating Point Unit, Load/Store Unit) are duplicated in the pipeline
of a superscalar processor which allows the hardware to issue multiple
instructions to each unit simultaneously.
◍ Strong scaling.
Answer: Speed-up achieved on a multiprocessor without increasing the size
of the problem.
◍ Flash memory.
Answer: A nonvolatile semiconductor memory. It is cheaper and slower than
DRAM but more expensive per bit and faster than magnetic disks. Access
times are about 5 to 50 microseconds and cost per gigabyte in 2012 was
$0.75 to $1.00.
◍ virtually addressed cache.
Answer: A cache that is accessed with a virtual address rather than a
physical addressDoes not use the TLB
◍ overflow (floating point).
Answer: A situation in which a positive exponent becomes too large to fit in
the exponent field.
◍ cache ready signal.
Answer: set in the Compare Tag state if requested read or write is a hit
◍ condition codes (flag).
, Answer: 4 bits are usedIn MIPS, two registers are compared and the result
of the comparison is stored in a third register. Then a conditional branching
statement assess the value of the third register to see if the condition is true
or false.Negative (N)Zero (Z)Overflow (V)Carry (C)
◍ possession/control.
Answer: the physical disposition of the media on which the data is stored
◍ asymmetric key cryptography (public key cryptography).
Answer: this method uses 2 keys, a public key and a private key
◍ Tournament branch predictor.
Answer: A branch predictor with multiple predictions for each branch and a
selection mechanism that chooses which predictor to enable for a given
branch.
◍ Tomasulo's Algorithm.
Answer: An algorithm for dynamic scheduling and out-of-order
executionuses dynamic hazard detection, generalized forwarding, and
reservation stations.
◍ Program Counter (PC).
Answer: The register that contains the address of the next instruction to be
executed
◍ bounds checking.
Answer: to set a limit on the amount of data we expect to receive to set aside
storage for that data*required in most programming languages* prevents
buffer overflows
◍ Branch target buffer.
Answer: A structure that caches the destination PC or destination instruction
for a branch. It is usually organized as a cache with tags, making it more
costly than a simple prediction buffer.
◍ B.MI.
Answer: branch on minusN=1
,◍ violation.
Answer: the act of doing something that is prohibited by law or rule
◍ B.VS.
Answer: branch on overflow setV=1
◍ R-Format Instructions.
Answer: They all read two registers, perform an ALU operation on the
contents of the registers, and write the result to a register. We call these
instructions either R-type instructions or arithmetic-logical instructions
(since they perform arithmetic or logical operations). This instruction class
includes ADD, SUB, AND, and ORR, Need an ALU to operate on the
values read from the registers.
◍ Streaming processor (SP).
Answer: the primary thread instruction processor in the multiprocessor
◍ base register.
Answer: register that holds an array's base address (X22 below)
◍ CDC 6600.
Answer: This system is widely considered to have been the first
supercomputer. Also first load-store architecture
◍ Caesar cipher.
Answer: an ancient cryptographic technique based on transposition; involves
shifting each letter of a plaintext message by a certain number of letters
(historically 3)
◍ Wireshark.
Answer: a graphical interface protocol sniffing tool that is capable of
filtering, sorting, & analyzing both wired and wireless traffic- popular
troubleshooting tool
◍ Address.
Answer: A value used to delineate the location of a specific data element
within a memory array.
, ◍ stream cipher.
Answer: A type of cipher that encrypts each bit in the plaintext message, 1
bit at a time
◍ Data transfer instruction.
Answer: A command that moves data between memory and registers.
◍ MVZ.
Answer: move wide with zero
◍ confused deputy problem.
Answer: A type of attack that is more common in systems that use ACLs
rather than capabilities; - when software has greater permissions than user,
the user can trick the software into misusing authority
◍ rising clock edge.
Answer: 0 to 1
◍ Datapath.
Answer: The component of the processor that performs arithmetic
operations
◍ Pipeline stall (bubble).
Answer: a stall initiated in order to resolve a hazard
◍ exploits.
Answer: small bits of software that take advantage of flaws in
software/applications in order to cause them to behave in ways that were not
intended by their creators
◍ RAID 1 (mirroring).
Answer: Two drives are used in unison, and all data is written to both drives,
giving you a mirror or extra copy of the data, in the case that one drive fails
◍ vulnerability assessment.
Answer: An activity involving the careful examination of our environment
using vulnerability scanning tools in order to discover vulnerabilities
