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CNIT 176 Exam 2 2026 – 120 Expert Verified Questions & Answers on CPU Architecture, Operating Systems, RAID and Networking

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This document contains approximately 120 expertly verified exam questions and answers for CNIT 176 Exam 2 (2026), covering core computer architecture, memory systems, operating system structures, storage technologies, and networking standards. The material provides detailed explanations of CPU components including the Arithmetic Logic Unit (ALU), Control Unit (CU), registers (PC, IR, status register), and the fetch–execute cycle. It also reviews memory types such as DRAM, SRAM, ROM, and flash memory, as well as bus architectures (parallel vs serial), point-to-point and multipoint connections, vectored vs polled interrupts, and programmed I/O limitations. The guide thoroughly addresses operating system concepts including kernel vs shell, memory-resident vs non-resident programs, CLI, monolithic vs modular/hierarchical OS configurations, distributed systems, embedded control systems, real-time systems, and core OS functions such as hardware interaction and network communication support. Storage and file system topics include RAID 0 and RAID 1, disk arrays, seek time, latency, transfer time, sequential access, random access, indexed access, directory structures (tree and linked structures), and wear-leveling software. Networking content covers backbone networks, ICANN, IANA, IEEE (802.3, 802.11), IETF and RFC standards, multiprocessing vs multitasking, and I/O interconnect examples such as USB, ATA, PCI, HyperTransport, and QuickPath. This document is particularly suitable for: Students enrolled in CNIT 176 Computer Systems or similar IT infrastructure courses Information technology and networking majors preparing for Exam 2 Computer science students reviewing CPU, OS, and storage architecture concepts Learners seeking a structured Q&A study guide for midterm or final exam preparation It serves as a comprehensive and exam-focused review resource designed to reinforce understanding of hardware architecture, operating system design, memory hierarchy, storage performance, interrupt handling, file organization methods, and networking standards essential for strong academic performance in computer information technology courses. Keywords: CPU architecture, ALU control unit registers, program counter instruction register, fetch execute cycle, DRAM SRAM ROM flash memory, RAID 0 RAID 1, disk seek time latency transfer time, kernel vs shell, CLI interface, monolithic OS, modular hierarchical OS, distributed systems, real time systems, file access methods, directory tree structure, IEEE 802.3 802.11, ICANN IANA IETF, vectored interrupts, polled interrupts, serial vs parallel bus, I O interconnects USB PCI ATA

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CNIT 176 Exam 2 2026 Expert
Verified | Ace the Test



ALU (Arithmetic logic unit) - 🧠ANSWER ✔✔Performs calculations and

comparisons within CPU


CU (Control unit) - 🧠ANSWER ✔✔Performs fetch/execution cycle,

accesses program instructions and issues commands to the ALU, moves

data to and from CPU registers and other hardware components


Registers - 🧠ANSWER ✔✔small permanent storage locations within the

CPU, executes programs, receives signals from external devices

, PC (Program counter register) - 🧠ANSWER ✔✔Instruction pointer


IR (Instruction register) - 🧠ANSWER ✔✔Stores instruction that is fetched

from memory


Status register - 🧠ANSWER ✔✔Status of CPU and currently executing

programs, uses flags to track conditions like arithmetic, power failure,

internal errors


DRAM (Dynamic ram) - 🧠ANSWER ✔✔Most common, cheap, less

electrical power, smaller space, volatile


SRAM (Static ram) - 🧠ANSWER ✔✔Faster,expensive


ROM (Read only memory) - 🧠ANSWER ✔✔Used for the system BIOS


Flash memory - 🧠ANSWER ✔✔Inexpensive, nonvolatile, used in tablets,

phones, etc. Ex.) SSD


Fetch - 🧠ANSWER ✔✔Finds an instruction, load from memory into register


Execute - 🧠ANSWER ✔✔Performs operation that instruction requires


Bus - 🧠ANSWER ✔✔Group of electrical or optical conductors for carrying

signals from one location to another -- Physical connection that makes it

Información del documento

Subido en
1 de marzo de 2026
Número de páginas
8
Escrito en
2025/2026
Tipo
Examen
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