National University of Computer and Emerging Sciences
EE-3009 Computer Architecture Sessional I Exam
th
Date: February 25 2026
Total Time (Hrs): 1
Course Instructor(s)
Dr. Muhammad Usama, Ms. Sumaira Mustafa and
Total Marks: 50
Mr. Muhammad Adeel Total Questions: 2
Roll No Section Student Signature
Vetted by: Signature:
Do not write below this line
Read each question carefully; marks will be deducted for not meeting the requirements.
Scientific Calculators are allowed during examination
Instruction/ Notes Marks for each question are indicated alongside the question.
Use last page for rough work
Understanding the part of the paper, you are not allowed to disturb the invigilator to seek any help.
Q1 Q2
CLO 2 CLO 2
25 25
CLO #2: Describe the performance evaluation criteria of computers and compare performance of different computing systems
Question # 1: Answer the following questions based on a 64-bit RISC-V architecture with little-endian memory organization
and register-indirect control transfer. Answers without numerical justification and reference to architectural bit-width will not
receive full marks
Memory starting at address 0x4000 contains:
Address 0x4000 0x4001 0x4002 0x4003 0x4004 0x4005 0x4006 0x4007
Value 0xAA 0XBB 0xCC 0xDD 0xEE 0xFF 0x00 0x11
Part A: (3*5=15 Marks)
I. Determine the 64-bit value loaded by the RISC-V
Instruction:
LD x8, 0(x1) ;if x1 = 0x4000 (LD means Load Double word.)
Spring 2026 Department of Computer Science Page 1 of 6
, National University of Computer and Emerging Sciences
II. Determine whether the instruction LD x8, 4(x1) is aligned and what its cost is. Show the numerical alignment
check.
III. A loop begins at address 0x8000 in the same RISC-V system. The loop body is 3600 bytes long. The branch
instruction is the final instruction in the loop. Compute the displacement required (in bytes) to branch back to
the start of the loop.
Part B: (10 Marks)
Suppose the program implements a switch-case statement using a jump table stored at address 0x9000. (where x10 =
0x9000). The following code executes:
LD x5, 0(x10) ; (LD means Load Double word.)
JR x5 ; (JR means jump register (jumps to the specific address))
I. Determine the value loaded into x5.
Spring 2026 Department of Computer Science Page 2 of 6
EE-3009 Computer Architecture Sessional I Exam
th
Date: February 25 2026
Total Time (Hrs): 1
Course Instructor(s)
Dr. Muhammad Usama, Ms. Sumaira Mustafa and
Total Marks: 50
Mr. Muhammad Adeel Total Questions: 2
Roll No Section Student Signature
Vetted by: Signature:
Do not write below this line
Read each question carefully; marks will be deducted for not meeting the requirements.
Scientific Calculators are allowed during examination
Instruction/ Notes Marks for each question are indicated alongside the question.
Use last page for rough work
Understanding the part of the paper, you are not allowed to disturb the invigilator to seek any help.
Q1 Q2
CLO 2 CLO 2
25 25
CLO #2: Describe the performance evaluation criteria of computers and compare performance of different computing systems
Question # 1: Answer the following questions based on a 64-bit RISC-V architecture with little-endian memory organization
and register-indirect control transfer. Answers without numerical justification and reference to architectural bit-width will not
receive full marks
Memory starting at address 0x4000 contains:
Address 0x4000 0x4001 0x4002 0x4003 0x4004 0x4005 0x4006 0x4007
Value 0xAA 0XBB 0xCC 0xDD 0xEE 0xFF 0x00 0x11
Part A: (3*5=15 Marks)
I. Determine the 64-bit value loaded by the RISC-V
Instruction:
LD x8, 0(x1) ;if x1 = 0x4000 (LD means Load Double word.)
Spring 2026 Department of Computer Science Page 1 of 6
, National University of Computer and Emerging Sciences
II. Determine whether the instruction LD x8, 4(x1) is aligned and what its cost is. Show the numerical alignment
check.
III. A loop begins at address 0x8000 in the same RISC-V system. The loop body is 3600 bytes long. The branch
instruction is the final instruction in the loop. Compute the displacement required (in bytes) to branch back to
the start of the loop.
Part B: (10 Marks)
Suppose the program implements a switch-case statement using a jump table stored at address 0x9000. (where x10 =
0x9000). The following code executes:
LD x5, 0(x10) ; (LD means Load Double word.)
JR x5 ; (JR means jump register (jumps to the specific address))
I. Determine the value loaded into x5.
Spring 2026 Department of Computer Science Page 2 of 6
