COS3721 Assignment 01
QUESTION: 01
1.
a.
1. The CPU can initiate a DMA operation by writing values into special registers that can be
independently accessed by the device.
2. The device initiates the corresponding operation once it receives a command from the
CPU.
b.
1. The device initiates the corresponding operation once it receives a command from the CPU .
2. When the device is finished with its operation , it interrupts the CPU to indicate the
completion of the operation.
c.
1. Both the CPU and the DMA controller are the bus masters.
2. A problem would be created if both the CPU and the DMA controller want to access the
memory when the DMA controller seizes the memory bus.
3. However, if the CPU is still allowed to access data in its primary and secondary caches, a
coherency issue may be created if both the CPU and DMA controller update the same
memory locations.
2.
• Storage capacity and performance with heavy software.
• Mobile devices are a great technology advance, which establishes great practicality and
comfort.
QUESTION: 02
1.
• Pass parameters using registers
• Store the parameters in a table in memory and the table address is passed in a register to the
OS.
• Push the parameters into a stack and off by the operating System.
2.
• Faster rendering – With AOT, the browser downloads a pre-compiled version of the
application.
• The browser loads executable code so it can render the application immediately, without
waiting to compile the app first.
3.
• Because the normal API and the virtual machine are both created to be compatible with
desktop and server systems.
• Google has created a different API and virtual machine for mobile devices .
• They are not compatible with mobile devices
QUESTION: 03
QUESTION: 01
1.
a.
1. The CPU can initiate a DMA operation by writing values into special registers that can be
independently accessed by the device.
2. The device initiates the corresponding operation once it receives a command from the
CPU.
b.
1. The device initiates the corresponding operation once it receives a command from the CPU .
2. When the device is finished with its operation , it interrupts the CPU to indicate the
completion of the operation.
c.
1. Both the CPU and the DMA controller are the bus masters.
2. A problem would be created if both the CPU and the DMA controller want to access the
memory when the DMA controller seizes the memory bus.
3. However, if the CPU is still allowed to access data in its primary and secondary caches, a
coherency issue may be created if both the CPU and DMA controller update the same
memory locations.
2.
• Storage capacity and performance with heavy software.
• Mobile devices are a great technology advance, which establishes great practicality and
comfort.
QUESTION: 02
1.
• Pass parameters using registers
• Store the parameters in a table in memory and the table address is passed in a register to the
OS.
• Push the parameters into a stack and off by the operating System.
2.
• Faster rendering – With AOT, the browser downloads a pre-compiled version of the
application.
• The browser loads executable code so it can render the application immediately, without
waiting to compile the app first.
3.
• Because the normal API and the virtual machine are both created to be compatible with
desktop and server systems.
• Google has created a different API and virtual machine for mobile devices .
• They are not compatible with mobile devices
QUESTION: 03
