WGU C952 Computer Architecture Terms defined and explained correctly

WGU C952 Computer Architecture Terms defined and explained correctly WGU C952 Computer Architecture Terms defined and explained correctly Personal computer (PC) correct answer A computer designed for use by an individual, usually incorporating a graphics display, a keyboard, and a mouse. Server correct answer A computer used for running larger programs for multiple users, often simultaneously, and typically accessed only via a network. Supercomputer: correct answer A class of computers with the highest performance and cost; they are configured as servers and typically cost tens to hundreds of millions of dollars. Embedded computer: correct answer A computer inside another device used for running one predetermined application or collection of software. Personal mobile devices (PMDs) correct answer are small wireless devices to connect to the Internet; they rely on batteries for power, and software is installed by downloading apps. Conventional examples are smart phones and tablets. Cloud computing correct answer refers to large collections of servers that provide services over the Internet; some providers rent dynamically varying numbers of servers as a utility. Software as a Service (SaaS) correct answer delivers software and data as a service over the Internet, usually via a thin program such as a browser that runs on local client devices, instead of binary code that must be installed, and runs wholly on that device. Examples include web search and social networking. Multicore microprocessor correct answer A microprocessor containing multiple processors ("cores") in a single integrated circuit. Acronym correct answer A word constructed by taking the initial letters of a string of words. For example: RAM is an acronym for Random Access Memory, and CPU is an acronym for Central Processing Unit. Terabyte (TB): correct answer Originally 1,099,511,627,776 (240) bytes, although communications and secondary storage systems developers started using the term to mean 1,000,000,000,000 (1012) bytes. To reduce confusion, we now use the term tebibyte (TiB) for 240 bytes, defining terabyte (TB) to mean 1012 bytes. The figure below shows the full range of decimal and binary values and names. Systems software: correct answer Software that provides services that are commonly useful, including operating systems, compilers, loaders, and assemblers. Operating system correct answer Supervising program that manages the resources of a computer for the benefit of the programs that run on that computer. Compiler correct answer A program that translates high-level language statements into assembly language statements. Binary digit correct answer Also called a bit. One of the two numbers in base 2 (0 or 1) that are the components of information. Instruction correct answer A command that computer hardware understands and obeys Assembler correct answer A program that translates a symbolic version of instructions into the binary version. Assembly language correct answer A symbolic representation of machine instructions. Machine language correct answer A binary representation of machine instructions High-level programming language correct answer A portable language such as C, C++, Java, or Visual Basic that is composed of words and algebraic notation that can be translated by a compiler into assembly language. Input device correct answer A mechanism through which the computer is fed information, such as a keyboard. Output device correct answer A mechanism that conveys the result of a computation to a user, such as a display, or to another computer Liquid crystal display: correct answer A display technology using a thin layer of liquid polymers that can be used to transmit or block light according to whether a charge is applied. Active matrix display correct answer A liquid crystal display using a transistor to control the transmission of light at each individual pixel. Pixel correct answer The smallest individual picture element. Screens are composed of hundreds of thousands to millions of pixels, organized in a matrix. Integrated circuit correct answer Also called a chip. A device combining dozens to millions of transistors. Central processor unit (CPU) correct answer Also called processor. The active part of the computer, which contains the datapath and control and which adds numbers, tests numbers, signals I/O devices to activate, and so on. Datapath correct answer The component of the processor that performs arithmetic operations. Control correct answer The component of the processor that commands the datapath, memory, and I/O devices according to the instructions of the program. Memory correct answer The storage area in which programs are kept when they are running and that contains the data needed by the running programs. Dynamic random access memory (DRAM) correct answer Memory built as an integrated circuit; it provides random access to any location. Access times are 50 nanoseconds and cost per gigabyte in 2012 was $5 to $10. Cache memory correct answer A small, fast memory that acts as a buffer for a slower, larger memory. Static random access memory (SRAM): correct answer Also memory built as an integrated circuit, but faster and less dense than DRAM. Instruction set architecture correct answer Also called architecture. An abstract interface between the hardware and the lowest-level software that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, I/O, and so on. Application binary interface (ABI) correct answer The user portion of the instruction set plus the operating system interfaces used by application programmers. It defines a standard for binary portability across computers. Implementation correct answer Hardware that obeys the architecture abstraction Volatile memory correct answer Storage, such as DRAM, that retains data only if it is receiving power. Nonvolatile memory correct answer A form of memory that retains data even in the absence of a power source and that is used to store programs between runs. A DVD disk is nonvolatile. Main memory correct answer Also called primary memory. Memory used to hold programs while they are running; typically consists of DRAM in today's computers. Secondary memory correct answer Nonvolatile memory used to store programs and data between runs; typically consists of flash memory in PMDs and magnetic disks in servers. Magnetic disk correct answer Also called hard disk. A form of nonvolatile secondary memory composed of rotating platters coated with a magnetic recording material. Because they are rotating mechanical devices, access times are about 5 to 20 milliseconds and cost per gigabyte in 2012 was $0.05 to $0.10. Flash memory correct answer A nonvolatile semiconductor memory. It is cheaper and slower than DRAM but more expensive per bit and faster than magnetic disks. Access times are about 5 to 50 microseconds and cost per gigabyte in 2012 was $0.75 to $1.00. Local area network (LAN) correct answer A network designed to carry data within a geographically confined area, typically within a single building Wide area network (WAN) correct answer A network extended over hundreds of kilometers that can span a continent Transistor correct answer An on/off switch controlled by an electric signal. Very large-scale integrated (VLSI) circuit: correct answer A device containing hundreds of thousands to millions of transistors Silicon correct answer A natural element that is a semiconductor Semiconductor correct answer A substance that does not conduct electricity well. Silicon crystal ingot correct answer A rod composed of a silicon crystal that is between 8 and 12 inches in diameter and about 12 to 24 inches long. Wafer correct answer A slice from a silicon ingot no more than 0.1 inches thick, used to create chips Defect correct answer A microscopic flaw in a wafer or in patterning steps that can result in the failure of the die containing that defect. Die: correct answer The individual rectangular sections that are cut from a wafer, more informally known as chips. Yield correct answer The percentage of good dies from the total number of dies on the wafer. Response time correct answer Also called execution time. The total time required for the computer to complete a task, including disk accesses, memory accesses, I/O activities, operating system overhead, CPU execution time, and so on. Throughput correct answer Also called bandwidth. Another measure of performance, it is the number of tasks completed per unit time. CPU execution time correct answer Also called CPU time. The actual time the CPU spends computing for a specific task User CPU time correct answer The CPU time spent in a program itself System CPU time correct answer The CPU time spent in the operating system performing tasks on behalf of the program. Clock cycle: correct answer Also called tick, clock tick, clock period, clock, or cycle. The time for one clock period, usually of the processor clock, which runs at a constant rate. Clock period correct answer The length of each clock cycle Clock cycles per instruction (CPI): correct answer Average number of clock cycles per instruction for a program or program fragment. Instruction count correct answer The number of instructions executed by the program. Instruction mix: correct answer A measure of the dynamic frequency of instructions across one or many programs. Workload correct answer A set of programs run on a computer that is either the actual collection of applications run by a user or constructed from real programs to approximate such a mix. A typical workload specifies both the programs and the relative frequencies. Benchmark correct answer A program selected for use in comparing computer performance. Amdahl's Law correct answer A rule stating that the performance enhancement possible with a given improvement is limited by the amount that the improved feature is used. It is a quantitative version of the law of diminishing returns. Million instructions per second (MIPS) correct answer A measurement of program execution speed based on the number of millions of instructions. MIPS is computed as the instruction count divided by the product of the execution time and 106. Instruction set: correct answer The vocabulary of commands understood by a given architecture. Stored-program concept correct answer The idea that instructions and data of many types can be stored in memory as numbers and thus be easy to change, leading to the stored-program computer. Word correct answer A natural unit of access in a computer, usually a group of 32 bits. Doubleword correct answer Another natural unit of access in a computer, usually a group of 64 bits; corresponds to the size of a register in the LEGv8 architecture. Data transfer instruction correct answer A command that moves data between memory and registers. Address correct answer A value used to delineate the location of a specific data element within a memory array. Alignment restriction correct answer A requirement that data be aligned in memory on natural boundaries. Binary digit correct answer Also called binary bit. One of the two numbers in base 2, 0 or 1, that are the components of information. Least significant bit correct answer The rightmost bit in an LEGv8 doubleword Most significant bit correct answer The leftmost bit in an LEGv8 doubleword. Two's complement correct answer A signed number representation where a leading 0 indicates a positive number and a leading 1 indicates a negative number. The complement of a value is obtained by complementing each bit (0 → 1 or 1 → 0), and then adding one to the result (explained further below). One's complement correct answer A notation that represents the most negative value by 10 ... 000two and the most positive value by 01 ... 11two, leaving an equal number of negatives and positives but ending up with two zeros, one positive (00 ... 00two) and one negative (11 ... 11two). The term is also used to mean the inversion of every bit in a pattern: 0 to 1 and 1 to 0. Biased notation correct answer A notation that represents the most negative value by 00 ... 000two and the most positive value by 11 ... 11two, with 0 typically having the value 10 ... 00two, thereby biasing the number such that the number plus the bias has a non-negative representation. Instruction format correct answer A form of representation of an instruction composed of fields of binary numbers. Machine language correct answer Binary representation used for communication within a computer system. Hexadecimal correct answer Numbers in base 16 Opcode correct answer The field that denotes the operation and format of an instruction. AND correct answer A logical bit- by-bit operation with two operands that calculates a 1 only if there is a 1 in both operands. OR correct answer A logical bit-by-bit operation with two operands that calculates a 1 if there is a 1 in either operand. NOT correct answer A logical bit-by-bit operation with one operand that inverts the bits; that is, it replaces every 1 with a 0, and every 0 with a 1. EOR correct answer A logical bit-by-bit operation with two operands that calculates the exclusive OR of the two operands. That is, it calculates a 1 only if the values are different in the two operands. Conditional branch correct answer An instruction that tests a value and that allows for a subsequent transfer of control to a new address in the program based on the outcome of the test. Basic block correct answer A sequence of instructions without branches (except possibly at the end) and without branch targets or branch labels (except possibly at the beginning). Branch address table correct answer Also called branch table. A table of addresses of alternative instruction sequences. Procedure correct answer A stored subroutine that performs a specific task based on the parameters with which it is provided. Branch-and-link instruction correct answer An instruction that branches to an address and simultaneously saves the address of the following instruction in a register (LR or X30 in LEGv8). Return address correct answer A link to the calling site that allows a procedure to return to the proper address; in LEGv8 it is stored in register LR (X30). Caller correct answer The program that instigates a procedure and provides the necessary parameter values. Callee correct answer A procedure that executes a series of stored instructions based on parameters provided by the caller and then returns control to the caller. Program counter (PC) correct answer The register containing the address of the instruction in the program being executed. Stack correct answer A data structure for spilling registers organized as a last-in- first-out queue. Stack pointer correct answer A value denoting the most recently allocated address in a stack that shows where registers should be spilled or where old register values can be found. In LEGv8, it is register SP. Push correct answer Add element to stack Pop correct answer Remove element from stack. Global pointer correct answer The register that is reserved to point to the static area Procedure frame correct answer Also called activation record. The segment of the stack containing a procedure's saved registers and local variables Frame pointer correct answer A value denoting the location of the saved registers and local variables for a given procedure. Text segment correct answer The segment of a UNIX object file that contains the machine language code for routines in the source file PC-relative addressing correct answer An addressing regime in which the address is the sum of the program counter (PC) and a constant in the instruction. Addressing mode correct answer One of several addressing regimes delimited by their varied use of operands and/or addresses. Data race correct answer Two memory accesses form a data race if they are from different threads to same location, at least one is a write, and they occur one after another. Assembly language correct answer A symbolic language that can be translated into binary machine language. Pseudoinstruction correct answer A common variation of assembly language instructions often treated as if it were an instruction in its own right. Symbol table correct answer A table that matches names of labels to the addresses of the memory words that instructions occupy. Linker correct answer Also called link editor. A systems program that combines independently assembled machine language programs and resolves all undefined labels into an executable file. Executable file correct answer A functional program in the format of an object file that contains no unresolved references. It can contain symbol tables and debugging information. A "stripped executable" does not contain that information. Relocation information may be included for the loader. Loader correct answer A systems program that places an object program in main memory so that it is ready to execute. Dynamically linked libraries (DLLs) correct answer Library routines that are linked to a program during execution. Java bytecode correct answer Instruction from an instruction set designed to interpret Java programs Java Virtual Machine (JVM) correct answer The program that interprets Java bytecodes. Just In Time compiler (JIT) correct answer The name commonly given to a compiler that operates at runtime, translating the interpreted code segments into the native code of the computer. Loop-unrolling: correct answer A technique to get more performance from loops that access arrays, in which multiple copies of the loop body are made and instructions from different iterations are scheduled together. Public correct answer A Java keyword that allows a method to be invoked by any other method. Protected: correct answer A Java keyword that restricts invocation of a method to other methods in that package. Package correct answer Basically a directory that contains a group of related classes Static method correct answer A method that applies to the whole class rather to an individual object. It is unrelated to static in C. General-purpose register (GPR): correct answer A register that can be used for addresses or for data with virtually any instruction. Accumulator: correct answer Archaic term for register. On-line use of it as a synonym for "register" is a fairly reliable indication that the user has been around quite a while. Load-store architecture correct answer Also called register-register architecture. An instruction set architecture in which all operations are between registers and data memory may only be accessed via loads or stores. Arithmetic Logic Unit (ALU) correct answer Hardware that performs addition, subtraction, and usually logical operations such as AND and OR Dividend: correct answer A number being divided. Divisor: correct answer A number that the dividend is divided by. Quotient: correct answer The primary result of a division; a number that when multiplied by the divisor and added to the remainder produces the dividend. Remainder correct answer The secondary result of a division; a number that when added to the product of the quotient and the divisor produces the dividend. Scientific notation correct answer A notation that renders numbers with a single digit to the left of the decimal point. Normalized correct answer A number in floating-point notation that has no leading 0s Floating point correct answer Computer arithmetic that represents numbers in which the binary point is not fixed Fraction: correct answer The value, generally between 0 and 1, placed in the fraction field. The fraction is also called the mantissa. Exponent correct answer In the numerical representation system of floating-point arithmetic, the value that is placed in the exponent field Overflow (floating-point) correct answer A situation in which a positive exponent becomes too large to fit in the exponent field. Underflow (floating-point): correct answer A situation in which a negative exponent becomes too large to fit in the exponent field. Double precision: correct answer A floating-point value represented in a 64-bit doubleword. Single precision correct answer A floating-point value represented in a 32-bit word Exception correct answer Also called interrupt. An unscheduled event that disrupts program execution; used to detect overflow. Interrupt: correct answer An exception that comes from outside of the processer. (Some architectures use the term interrupt for all exceptions. Guard: correct answer The first of two extra bits kept on the right during intermediate calculations of floating-point numbers; used to improve rounding accuracy. Round correct answer Method to make the intermediate floating-point result fit the floating-point format; the goal is typically to find the nearest number that can be represented in the format. It is also the name of the second of two extra bits kept on the right during intermediate floating-point calculations, which improves rounding accuracy. Units in the last place (ulp): correct answer The number of bits in error in the least significant bits of the significand between the actual number and the number that can be represented Sticky bit: correct answer A bit used in rounding in addition to guard and round that is set whenever there are nonzero bits to the right of the round bit Fused multiply add correct answer A floating-point instruction that performs both a multiply and an add, but rounds only once after the add. Combinational element: correct answer An operational element, such as an AND gate or an ALU. State element: correct answer A memory element, such as a register or a memory. Clocking methodology correct answer The approach used to determine when data is valid and stable relative to the clock. Edge-triggered clocking: correct answer A clocking scheme in which all state changes occur on a clock edge. Control signal correct answer A signal used for multiplexor selection or for directing the operation of a functional unit; contrasts with a data signal, which contains information that is operated on by a functional unit. Asserted: correct answer The signal is logically high or true. Deasserted: correct answer The signal is logically low or false Datapath element correct answer A unit used to operate on or hold data within a processor. In the LEGv8 implementation, the datapath elements include the instruction and data memories, the register file, the ALU, and adders. Program counter (PC): correct answer The register containing the address of the instruction in the program being executed. Register file correct answer A state element that consists of a set of registers that can be read and written by supplying a register number to be accessed. Sign-extend correct answer To increase the size of a data item by replicating the high-order sign bit of the original data item in the high-order bits of the larger, destination data item. Branch target address correct answer The address specified in a branch, which becomes the new program counter (PC) if the branch is taken. In the LEGv8 architecture, the branch target is given by the sum of the offset field of the instruction and the address of the branch. Branch taken correct answer A branch where the branch condition is satisfied and the program counter (PC) becomes the branch target. All unconditional branches are taken branches. Branch not taken or (untaken branch): correct answer A branch where the branch condition is false and the program counter (PC) becomes the address of the instruction that sequentially follows the branch. Truth table correct answer From logic, a representation of a logical operation by listing all the values of the inputs and then in each case showing what the resulting outputs should be. Don't-care term: correct answer An element of a logical function in which the output does not depend on the values of all the inputs. Don't-care terms may be specified in different ways. Opcode: correct answer The field that denotes the operation and format of an instruction. Single-cycle implementation correct answer Also called single clock cycle implementation. An implementation in which an instruction is executed in one clock cycle. While easy to understand, it is too slow to be practical. Pipelining: correct answer An implementation technique in which multiple instructions are overlapped in execution, much like an assembly line. Structural hazard: correct answer When a planned instruction cannot execute in the proper clock cycle because the hardware does not support the combination of instructions that are set to execute. Data hazard: correct answer Also called a pipeline data hazard. When a planned instruction cannot execute in the proper clock cycle because data that is needed to execute the instruction are not yet available. Forwarding: Also called bypassing. correct answer A method of resolving a data hazard by retrieving the missing data element from internal buffers rather than waiting for it to arrive from programmer-visible registers or memory. Load-use data hazard: correct answer A specific form of data hazard in which the data being loaded by a load instruction has not yet become available when it is needed by another instruction. Pipeline stall: Also called bubble correct answer A stall initiated in order to resolve a hazard Control hazard: Also called branch hazard correct answer When the proper instruction cannot execute in the proper pipeline clock cycle because the instruction that was fetched is not the one that is needed; that is, the flow of instruction addresses is not what the pipeline expected. Branch prediction correct answer A method of resolving a branch hazard that assumes a given outcome for the conditional branch and proceeds from that assumption rather than waiting to ascertain the actual outcome. Latency (pipeline) correct answer The number of stages in a pipeline or the number of stages between two instructions during execution nop correct answer An instruction that does no operation to change state Flush: correct answer To discard instructions in a pipeline, usually due to an unexpected event Dynamic branch prediction: correct answer Prediction of branches at runtime using runtime information. Branch prediction buffer: Also called branch history table correct answer A small memory that is indexed by the lower portion of the address of the branch instruction and that contains one or more bits indicating whether the branch was recently taken or not. Branch target buffer: correct answer A structure that caches the destination PC or destination instruction for a branch. It is usually organized as a cache with tags, making it more costly than a simple prediction buffer. Correlating predictor correct answer A branch predictor that combines local behavior of a particular branch and global information about the behavior of some recent number of executed branches. Tournament branch predictor correct answer A branch predictor with multiple predictions for each branch and a selection mechanism that chooses which predictor to enable for a given branch. Exception: Also called interrupt. correct answer An unscheduled event that disrupts program execution; used to detect overflow. Interrupt: correct answer An exception that comes from outside of the processor. (Some architectures use the term interrupt for all exceptions.) Vectored interrupt: correct answer An interrupt for which the address to which control is transferred is determined by the cause of the exception. Imprecise interrupt: Also called imprecise exception correct answer Interrupts or exceptions in pipelined computers that are not associated with the exact instruction that was the cause of the interrupt or exception Precise interrupt: Also called precise exception correct answer An interrupt or exception that is always associated with the correct instruction in pipelined computers. Instruction-level parallelism: correct answer The parallelism among instructions Multiple issue correct answer A scheme whereby multiple instructions are launched in one clock cycle. Static multiple issue: correct answer An approach to implementing a multiple-issue processor where many decisions are made by the compiler before execution. Dynamic multiple issue correct answer An approach to implementing a multiple-issue processor where many decisions are made during execution by the processor. Issue slots: correct answer The positions from which instructions could issue in a given clock cycle; by analogy, these correspond to positions at the starting blocks for a sprint. Instruction-level parallelism: correct answer The parallelism among instructions. Multiple issue correct answer A scheme whereby multiple instructions are launched in one clock cycle. Static multiple issue correct answer An approach to implementing a multiple-issue processor where many decisions are made by the compiler before execution. Dynamic multiple issue correct answer An approach to implementing a multiple-issue processor where many decisions are made during execution by the processor. Speculation: correct answer An approach whereby the compiler or processor guesses the outcome of an instruction to remove it as a dependence in executing other instructions. Issue packet: correct answer The set of instructions that issues together in one clock cycle; the packet may be determined statically by the compiler or dynamically by the processor. Very Long Instruction Word (VLIW correct answer A style of instruction set architecture that launches many operations that are defined to be independent in a single wide instruction, typically with many separate opcode fields. Use latency correct answer Number of clock cycles between a load instruction and an instruction that can use the result of the load without stalling the pipeline. Loop unrolling correct answer A technique to get more performance from loops that access arrays, in which multiple copies of the loop body are made and instructions from different iterations are scheduled together. Register renaming correct answer The renaming of registers by the compiler or hardware to remove antidependences. Antidependence: correct answer An ordering forced by the reuse of a name, typically a register, rather than by a true dependence that carries a value between two instructions. Superscalar: correct answer An advanced pipelining technique that enables the processor to execute more than one instruction per clock cycle by selecting them during execution. Dynamic pipeline scheduling correct answer Hardware support for reordering the order of instruction execution to avoid stalls. Commit unit correct answer The unit in a dynamic or out-of-order execution pipeline that decides when it is safe to release the result of an operation to programmer-visible registers and memory Reservation station correct answer A buffer within a functional unit that holds the operands and the operation. Reorder buffer correct answer The buffer that holds results in a dynamically scheduled processor until it is safe to store the results to memory or a register. Out-of-order execution correct answer A situation in pipelined execution when an instruction blocked from executing does not cause the following instructions to wait. In-order commit: correct answer A commit in which the results of pipelined execution are written to the programmer visible state in the same order that instructions are fetched. Microarchitecture: correct answer The organization of the processor, including the major functional units, their interconnection, and control. Architectural registers correct answer The instruction set of visible registers of a processor; for example, in LEGv8, these are the 32 integer and 32 floating-point registers. Instruction latency: correct answer The inherent execution time for an instruction. Temporal locality: correct answer The locality principle stating that if a data location is referenced then it will tend to be referenced again soon Spatial locality correct answer The locality principle stating that if a data location is referenced, data locations with nearby addresses will tend to be referenced soon. Memory hierarchy: correct answer A structure that uses multiple levels of memories; as the distance from the processor increases, the size of the memories and the access time both increase. Block (or line): correct answer The minimum unit of information that can be either present or not present in a cache. Hit rate correct answer The fraction of memory accesses found in a level of the memory hierarchy. Miss rate correct answer The fraction of memory accesses not found in a level of the memory hierarchy Hit time: correct answer The time required to access a level of the memory hierarchy, including the time needed to determine whether the access is a hit or a miss. Miss penalty: correct answer The time required to fetch a block into a level of the memory hierarchy from the lower level, including the time to access the block, transmit it from one level to the other, insert it in the level that experienced the miss, and then pass the block to the requestor. Track correct answer One of thousands of concentric circles that make up the surface of a magnetic disk Sector correct answer One of the segments that make up a track on a magnetic disk; a sector is the smallest amount of information that is read or written on a disk. Seek correct answer The process of positioning a read/write head over the proper track on a disk. Rotational latency: Also called rotational delay. correct answer The time required for the desired sector of a disk to rotate under the read/write head; usually assumed to be half the rotation time. Direct-mapped cache correct answer A cache structure in which each memory location is mapped to exactly one location in the cache. Tag correct answer A field in a table used for a memory hierarchy that contains the address information required to identify whether the associated block in the hierarchy corresponds to a requested word. Valid bit correct answer A field in the tables of a memory hierarchy that indicates that the associated block in the hierarchy contains valid data. Cache miss: correct answer A request for data from the cache that cannot be filled because the data are not present in the cache. Write-through: correct answer A scheme in which writes always update both the cache and the next lower level of the memory hierarchy, ensuring that data are always consistent between the two. Write buffer correct answer A queue that holds data while the data are waiting to be written to memory. Write-back: correct answer A scheme that handles writes by updating values only to the block in the cache, then writing the modified block to the lower level of the hierarchy when the block is replaced. Split cache correct answer A scheme in which a level of the memory hierarchy is composed of two independent caches that operate in parallel with each other, with one handling instructions and one handling data. Fully associative cache correct answer A cache structure in which a block can be placed in any location in the cache Set-associative cache correct answer A cache that has a fixed number of locations (at least two) where each block can be placed Least recently used (LRU) correct answer A replacement scheme in which the block replaced is the one that has been unused for the longest time. Multilevel cache correct answer A memory hierarchy with multiple levels of caches, rather than just a cache and main memory. Global miss rate: correct answer The fraction of references that miss in all levels of a mutlilevel cache. Local miss rate: correct answer The fraction of references to one level of a cache that miss; used in multilevel hierarchies. Error detection code: correct answer A code that enables the detection of an error in data, but not the precise location and, hence, correction of the error. Virtual memory correct answer A technique that uses main memory as a "cache" for secondary storage Physical address correct answer An address in main memory. Protection correct answer A set of mechanisms for ensuring that multiple processes sharing the processor, memory, or I/O devices cannot interfere, intentionally or unintentionally, with one another by reading or writing each other's data. These mechanisms also isolate the operating system from a user process. Page fault: correct answer An event that occurs when an accessed page is not present in main memory Virtual address correct answer An address that corresponds to a location in virtual space and is translated by address mapping to a physical address when memory is accessed Address translation: Also called address mapping correct answer The process by which a virtual address is mapped to an address used to access memory. Segmentation: correct answer A variable-size address mapping scheme in which an address consists of two parts: a segment number, which is mapped to a physical address, and a segment offset. Page table correct answer The table containing the virtual to physical address translations in a virtual memory system. The table, which is stored in memory, is typically indexed by the virtual page number; each entry in the table contains the physical page number for that virtual page if the page is currently in memory. Swap space: correct answer The space on the disk reserved for the full virtual memory space of a process Reference bit: Also called use bit or access bit. correct answer A field that is set whenever a page is accessed and that is used to implement LRU or other replacement schemes. Translation-lookaside buffer (TLB): correct answer A cache that keeps track of recently used address mappings to try to avoid an access to the page table. Virtually addressed cache correct answer A cache that is accessed with a virtual address rather than a physical address. Aliasing correct answer A situation in which two addresses access the same object; it can occur in virtual memory when there are two virtual addresses for the same physical page. Physically addressed cache correct answer A cache that is addressed by a physical address. Supervisor mode: Also called kernal mode. correct answer A mode indicating that a running process is an operating system process. System call correct answer A special instruction that transfers control from user mode to a dedicated location in supervisor code space, invoking the exception mechanism in the process. Exception enable correct answer Also called interrupt enable. A signal or action that controls whether the process responds to an exception or not; necessary for preventing the occurrence of exceptions during intervals before the processor has safely saved the state needed to restart. Restartable instruction correct answer An instruction that can resume execution after an exception is resolved without the exception's affecting the result of the instruction. Three Cs model correct answer A cache model in which all cache misses are classified into one of three categories: compulsory misses, capacity misses, and conflict misses. Compulsory miss: Also called cold-start miss correct answer A cache miss caused by the first access to a block that has never been in the cache Capacity miss: correct answer A cache miss that occurs because the cache, even with full associativity, cannot contain all the blocks needed to satisfy the request. Conflict miss: Also called collision miss. correct answer A cache miss that occurs in a set-associative or direct-mapped cache when multiple blocks compete for the same set and that are eliminated in a fully associative cache of the same size. Finite-state machine: correct answer A sequential logic function consisting of a set of inputs and outputs, a next-state function that maps the current state and the inputs to a new state, and an output function that maps the current state and possibly the inputs to a set of asserted outputs. Next-state machine correct answer A combinational function that, given the inputs and the current state, determines the next state of a finite-state machine. False sharing: correct answer When two unrelated shared variables are located in the same cache block and the full block is exchanged between processors even though the processors are accessing different variables. Redundant arrays of inexpensive disks (RAID) correct answer An organization of disks that uses an array of small and inexpensive disks so as to increase both performance and reliability. Striping correct answer Allocation of logically sequential blocks to separate disks to allow higher performance than a single disk can deliver. Mirroring correct answer Writing identical data to multiple disks to increase data availability. Protection group correct answer The group of data disks or blocks that share a common check disk or block. Hot-swapping: correct answer Replacing a hardware component while the system is running Standby spares correct answer Reserve hardware resources that can immediately take the place of a failed component Prefetching correct answer A technique in which data blocks needed in the future are brought into the cache early by using special instructions that specify the address of the block. Multiprocessor correct answer A computer system with at least two processors. This computer is in contrast to a uniprocessor, which has one, and is increasingly hard to find today. Task-level parallelism or process-level parallelism: correct answer Utilizing multiple processors by running independent programs simultaneously. Parallel processing program: correct answer A single program that runs on multiple processors simultaneously. Cluster: correct answer A set of computers connected over a local area network that function as a single large multiprocessor. Multicore microprocessor: correct answer A microprocessor containing multiple processors ("cores") in a single integrated circuit. Virtually all microprocessors today in desktops and servers are multicore. Shared memory multiprocessor (SMP): correct answer A parallel processor with a single physical address space. Strong scaling correct answer Speed-up achieved on a multiprocessor without increasing the size of the problem. Weak scaling correct answer Speed-up achieved on a multiprocessor while increasing the size of the problem proportionally to the increase in the number of processors. SISD or single instruction stream, single data stream correct answer A uniprocessor. MIMD or multiple instruction streams, multiple data streams: correct answer A multiprocessor. SPMD or single program, multiple data streams correct answer The conventional MIMD programming model, where a single program runs across all processors. SIMD or single instruction stream, multiple data streams: correct answer The same instruction is applied to many data streams, as in a vector processor. Data-level parallelism: correct answer Parallelism achieved by performing the same operation on independent data. Vector lane: correct answer One or more vector functional units and a portion of the vector register file. Inspired by lanes on highways that increase traffic speed, multiple lanes execute vector operations simultaneously. Hardware multithreading correct answer Increasing utilization of a processor by switching to another thread when one thread is stalled. Thread correct answer A thread includes the program counter, the register state, and the stack. It is a lightweight process; whereas threads commonly share a single address space, processes don't. Process: correct answer A process includes one or more threads, the address space, and the operating system state. Hence, a process switch usually invokes the operating system, but not a thread switch. Fine-grained multithreading: correct answer A version of hardware multithreading that implies switching between threads after every instruction. Coarse-grained multithreading: correct answer A version of hardware multithreading that implies switching between threads only after significant events, such as a last-level cache miss. Simultaneous multithreading (SMT): correct answer A version of multithreading that lowers the cost of multithreading by utilizing the resources needed for multiple issue, dynamically scheduled microarchitecture. Uniform memory access (UMA) correct answer A multiprocessor in which latency to any word in main memory is about the same no matter which processor requests the access. Nonuniform memory access (NUMA): correct answer A type of single address space multiprocessor in which some memory accesses are much faster than others depending on which processor asks for which word. Synchronization: correct answer The process of coordinating the behavior of two or more processes, which may be running on different processors. Lock correct answer A synchronization device that allows access to data to only one processor at a time Reduction: correct answer A function that processes a data structure and returns a single value. OpenMP: correct answer An API for shared memory multiprocessing in C, C++, or Fortran that runs on UNIX and Microsoft platforms. It includes compiler directives, a library, and runtime directives. Message passing: correct answer Communicating between multiple processors by explicitly sending and receiving information. Send message routine correct answer A routine used by a processor in machines with private memories to pass a message to another processor. Receive message routine: correct answer A routine used by a processor in machines with private memories to accept a message from another processor. Clusters: correct answer Collections of computers connected via I/O over standard network switches to form a message-passing multiprocessor. Software as a service (SaaS) correct answer Rather than selling software that is installed and run on customers' own computers, software is run at a remote site and made available over the Internet typically via a Web interface to customers. SaaS customers are charged based on use versus on ownership. Network bandwidth correct answer Informally, the peak transfer rate of a network; can refer to the speed of a single link or the collective transfer rate of all links in the network. Bisection bandwidth correct answer The bandwidth between two equal parts of a multiprocessor. This measure is for a worst case split of the multiprocessor. Fully connected network correct answer A network that connects processor-memory nodes by supplying a dedicated communication link between every node. Multistage network correct answer A network that supplies a small switch at each node. Crossbar network correct answer A network that allows any node to communicate with any other node in one pass through the network. Memory-mapped I/O correct answer An I/O scheme in which portions of the address space are assigned to I/O devices, and reads and writes to those addresses are interpreted as commands to the I/O device. Direct memory access (DMA): correct answer A mechanism that provides a device controller with the ability to transfer data directly to or from the memory without involving the processor. Interrupt-driven I/O: correct answer An I/O scheme that employs interrupts to indicate to the processor that an I/O device needs attention. Device driver correct answer A program that controls an I/O device that is attached to the computer. Polling correct answer The process of periodically checking the status of an I/O device to determine the need to service the device. Pthreads: correct answer A UNIX API for creating and manipulating threads. It is structured as a library Arithmetic intensity correct answer The ratio of floating-point operations in a program to the number of data bytes accessed by a program from main memory.