Memory Architecture
1. Introduction
Memory architecture refers to the structural and functional organization
of a computer’s memory system. “It defines how data and instructions
are stored, accessed, and transferred between different levels of
storage and the central processing unit (CPU).”
According to M. Morris Mano (Computer System Architecture),
memory architecture plays a fundamental role in the overall computer
organization, as it directly influences the system’s speed and efficiency.
A well-designed memory structure allows fast access to frequently used
instructions and data while maintaining large storage capacity for less
frequently used information.
Importance in System Performance:
1. Fast Data Access:
A well-designed memory architecture allows the CPU to access instructions and
data quickly.
The less time the CPU waits for data, the faster the system performs.
Example: Cache memory reduces delay by storing frequently used data close to
CPU.
2. Efficient Processing:
Proper hierarchy (register → cache → RAM → disk) ensures that every operation
happens at the most suitable speed and cost level.
This balance improves overall throughput.
3. Better Multitasking:
Memory management techniques (like segmentation and virtual memory) let
multiple programs run at once smoothly without crashing.
4. Reduced CPU Idle Time:
If the memory system is slow, the CPU has to wait.
Fast memory ensures CPU keeps working continuously — increasing system
efficiency.
5. Cost Optimization:
Different levels of memory (fast but costly cache vs. slower but cheaper RAM)
help build an economical yet high-speed computer.
,2. The Concept of Memory Hierarchy
2.1 Overview
The concept of memory hierarchy was introduced to bridge the gap
between the fast operation of the CPU and the relatively slow operation
of memory devices.
Mano (Chapter 12) describes that the memory system is organized in a
hierarchy of levels, each differing in speed, cost, and capacity.
2.2 Levels of Memory Hierarchy
Registers:
The fastest and smallest storage, located inside the CPU. They store
temporary data such as operands and intermediate results.
Cache Memory:
High-speed memory placed between the CPU and main memory to
reduce access time. Cache stores copies of frequently used data from
the main memory.
Main Memory (RAM):
The primary memory used for storing active programs and data. It is
volatile, meaning its contents are lost when power is off.
Secondary Memory:
Non-volatile storage such as hard disks and SSDs, used for long-term
data storage.
Tertiary or Auxiliary Storage:
Includes external devices like magnetic tapes and optical disks, used
for backup or archival purposes.
2.3 Hierarchical Trade-offs
As Mano explains, higher levels (like cache) are faster and more
expensive per bit, while lower levels (like disks) are slower but cheaper.
The efficiency of a computer depends on proper coordination between
these levels to ensure minimal delay in data transfer.
3. Main Memory Organization
3.1 Structure and Function
According to Barry B. Brey (The Intel Microprocessors, Ch. 10), main
memory in microprocessor-based systems is divided into addressable
units called memory cells. Each cell has a unique address, which the CPU
uses to read or write data.
, For the Intel 8086 processor, the memory system is organized as a 1 MB
address space, accessible through 20 address lines. Each memory
location can store 1 byte of data, and 16-bit data is stored in two
consecutive bytes.
Example:
Address lines A0–A19 in the 8086 can address memory locations from
00000H to FFFFFH.
3.2 Memory Segmentation (8086 Architecture)
Brey and Irvine both describe that the 8086 microprocessor uses
segmented memory addressing to access its 1 MB memory space
efficiently.
The 16-bit segment register combines with a 16-bit offset to produce a
20-bit physical address.
Formula:
Physical Address = (Segment × 10H) + Offset
Example:
If Code Segment (CS) = 2000H and Instruction Pointer (IP) = 0010H,
then Physical Address = (2000H × 10H) + 0010H = 20010H.
This segmentation divides memory into four logical parts:
Code Segment (CS): Stores executable program instructions.
Data Segment (DS): Holds program data variables.
Stack Segment (SS): Used for subroutine calls and local variables.
Extra Segment (ES): Provides additional space for data or strings.
This organization allows simultaneous handling of multiple data and
instruction segments, improving program modularity and flexibility.
4. Memory Addressing Modes
According to Kip Irvine (Assembly Language for Intel-Based
Computers), addressing modes define how the CPU locates data in
memory. Common modes include:
Immediate Addressing:
The operand is specified directly in the instruction.
Example: MOV AX, 05H
Direct Addressing:
The effective address of the operand is given explicitly.
Example: MOV AX, [1234H]
1. Introduction
Memory architecture refers to the structural and functional organization
of a computer’s memory system. “It defines how data and instructions
are stored, accessed, and transferred between different levels of
storage and the central processing unit (CPU).”
According to M. Morris Mano (Computer System Architecture),
memory architecture plays a fundamental role in the overall computer
organization, as it directly influences the system’s speed and efficiency.
A well-designed memory structure allows fast access to frequently used
instructions and data while maintaining large storage capacity for less
frequently used information.
Importance in System Performance:
1. Fast Data Access:
A well-designed memory architecture allows the CPU to access instructions and
data quickly.
The less time the CPU waits for data, the faster the system performs.
Example: Cache memory reduces delay by storing frequently used data close to
CPU.
2. Efficient Processing:
Proper hierarchy (register → cache → RAM → disk) ensures that every operation
happens at the most suitable speed and cost level.
This balance improves overall throughput.
3. Better Multitasking:
Memory management techniques (like segmentation and virtual memory) let
multiple programs run at once smoothly without crashing.
4. Reduced CPU Idle Time:
If the memory system is slow, the CPU has to wait.
Fast memory ensures CPU keeps working continuously — increasing system
efficiency.
5. Cost Optimization:
Different levels of memory (fast but costly cache vs. slower but cheaper RAM)
help build an economical yet high-speed computer.
,2. The Concept of Memory Hierarchy
2.1 Overview
The concept of memory hierarchy was introduced to bridge the gap
between the fast operation of the CPU and the relatively slow operation
of memory devices.
Mano (Chapter 12) describes that the memory system is organized in a
hierarchy of levels, each differing in speed, cost, and capacity.
2.2 Levels of Memory Hierarchy
Registers:
The fastest and smallest storage, located inside the CPU. They store
temporary data such as operands and intermediate results.
Cache Memory:
High-speed memory placed between the CPU and main memory to
reduce access time. Cache stores copies of frequently used data from
the main memory.
Main Memory (RAM):
The primary memory used for storing active programs and data. It is
volatile, meaning its contents are lost when power is off.
Secondary Memory:
Non-volatile storage such as hard disks and SSDs, used for long-term
data storage.
Tertiary or Auxiliary Storage:
Includes external devices like magnetic tapes and optical disks, used
for backup or archival purposes.
2.3 Hierarchical Trade-offs
As Mano explains, higher levels (like cache) are faster and more
expensive per bit, while lower levels (like disks) are slower but cheaper.
The efficiency of a computer depends on proper coordination between
these levels to ensure minimal delay in data transfer.
3. Main Memory Organization
3.1 Structure and Function
According to Barry B. Brey (The Intel Microprocessors, Ch. 10), main
memory in microprocessor-based systems is divided into addressable
units called memory cells. Each cell has a unique address, which the CPU
uses to read or write data.
, For the Intel 8086 processor, the memory system is organized as a 1 MB
address space, accessible through 20 address lines. Each memory
location can store 1 byte of data, and 16-bit data is stored in two
consecutive bytes.
Example:
Address lines A0–A19 in the 8086 can address memory locations from
00000H to FFFFFH.
3.2 Memory Segmentation (8086 Architecture)
Brey and Irvine both describe that the 8086 microprocessor uses
segmented memory addressing to access its 1 MB memory space
efficiently.
The 16-bit segment register combines with a 16-bit offset to produce a
20-bit physical address.
Formula:
Physical Address = (Segment × 10H) + Offset
Example:
If Code Segment (CS) = 2000H and Instruction Pointer (IP) = 0010H,
then Physical Address = (2000H × 10H) + 0010H = 20010H.
This segmentation divides memory into four logical parts:
Code Segment (CS): Stores executable program instructions.
Data Segment (DS): Holds program data variables.
Stack Segment (SS): Used for subroutine calls and local variables.
Extra Segment (ES): Provides additional space for data or strings.
This organization allows simultaneous handling of multiple data and
instruction segments, improving program modularity and flexibility.
4. Memory Addressing Modes
According to Kip Irvine (Assembly Language for Intel-Based
Computers), addressing modes define how the CPU locates data in
memory. Common modes include:
Immediate Addressing:
The operand is specified directly in the instruction.
Example: MOV AX, 05H
Direct Addressing:
The effective address of the operand is given explicitly.
Example: MOV AX, [1234H]
