Assignment 1 - 2023 COS3721
19.03.2023
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StudyWellNotes
, 1
Table of Contents
Question-1 Coverage : Chapter 1 3
Question 2: Operating-system structures 4
Question 3: Processes 5
Question 4: Threads and Concurrency 6
Question 5: CPU Scheduling 7
, 2
Question-1 Coverage : Chapter 1
1) Direct memory access is used for high-speed I/O devices in order to avoid increasing the
CPU’s execution load.
a. How does the CPU interface with the device to coordinate the transfer?(2)
b. How does the CPU know when the memory operations are complete?(2)
c. The CPU is allowed to execute other programs while the DMA controller is transferring
data. Does this process interfere with the execution of the user programs? If so, describe
what forms of interference are caused. (4)
a. The CPU can initiate a DMA operation by writing values
into special registers that can be independently accessed by the device. The device
initiates the corresponding operation once it receives a command from the CPU.
b. When the device is finished with its operation, it interrupts the CPU to indicate the
completion of the operation.
c. Both the device and the CPU can be accessing memory simultaneously. The memory
controller provides access to the memory bus in a fair manner to these two entities.
A CPU might therefore be unable to issue memory operations at peak speeds since
it has to compete with the device in order to obtain access to the memory bus.
2) Describe two challenges of designing operating systems for mobile devices compare with
designing operating systems for traditional PCs. (2)
The greatest challenges in designing mobile operating systems include:
● Less storage capacity means the operating system must manage memory
carefully.
● The operating system must also manage power consumption carefully.
● Less processing power plus fewer processors mean the operating system
must carefully apportion processors to applications.
19.03.2023
─
StudyWellNotes
, 1
Table of Contents
Question-1 Coverage : Chapter 1 3
Question 2: Operating-system structures 4
Question 3: Processes 5
Question 4: Threads and Concurrency 6
Question 5: CPU Scheduling 7
, 2
Question-1 Coverage : Chapter 1
1) Direct memory access is used for high-speed I/O devices in order to avoid increasing the
CPU’s execution load.
a. How does the CPU interface with the device to coordinate the transfer?(2)
b. How does the CPU know when the memory operations are complete?(2)
c. The CPU is allowed to execute other programs while the DMA controller is transferring
data. Does this process interfere with the execution of the user programs? If so, describe
what forms of interference are caused. (4)
a. The CPU can initiate a DMA operation by writing values
into special registers that can be independently accessed by the device. The device
initiates the corresponding operation once it receives a command from the CPU.
b. When the device is finished with its operation, it interrupts the CPU to indicate the
completion of the operation.
c. Both the device and the CPU can be accessing memory simultaneously. The memory
controller provides access to the memory bus in a fair manner to these two entities.
A CPU might therefore be unable to issue memory operations at peak speeds since
it has to compete with the device in order to obtain access to the memory bus.
2) Describe two challenges of designing operating systems for mobile devices compare with
designing operating systems for traditional PCs. (2)
The greatest challenges in designing mobile operating systems include:
● Less storage capacity means the operating system must manage memory
carefully.
● The operating system must also manage power consumption carefully.
● Less processing power plus fewer processors mean the operating system
must carefully apportion processors to applications.
